While Intel will use the full feature set of util_lut3 in the future, AGX can
use the cut down 2-source versions right now to get us an in-tree user.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37200>
Wasn't 100% sure about some of these derivations so let's add tests.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37200>
Many instruction sets (Intel, Apple, NVIDIA) implement bitwise operations with a
single general instruction that takes a lookup table in sum-of-products
(minterms) form. Working with these tables manually is a bit gnarly, and
multiple backends need to do this. This adds common code for representing such
lookup tables with 2- or 3-sources, with a rich set of helpers for building,
inspecting, and manipulating the LUTs.
Eventually, we may want to introduce a nir_op_bitop3 instruction to NIR to build
common code for fusing boolean expression trees into lookup tables. That NIR
pass will presumably use the helpers here.
NAK already has this abstraction internally (in Rust). Possibly NAK will be able
to drop (or cut down) that code once we handle this in NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37200>
We will use this to manipulate lookup tables, but it's a common algorithm.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37200>
these are new buffers with empty contents which are immediately
unmapped after a memcpy, so there's no reason to force
the driver (or tc) to sync
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36634>
these are new textures with empty contents which are immediately
unmapped after a strided memcpy, so there's no reason to force
the driver (or tc) to sync
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36634>
Use sequence-scoped clock (64 <= ID < 128) for GPU clock because there's
no central daemon emitting consistent snapshots for synchronization
between CPU and GPU clocks on behalf of renderstages and counters
producers.
When CPU clock is the same with the authoritative trace clock (normally
default to CLOCK_BOOTTIME), perfetto drops the non-monotonic snapshots
to ensure validity of the global source clock in the resolution graph.
When they are different, the clocks are marked invalid and the rest of
the clock syncs will fail during trace processing.
Now that PanVK has switched to use CLOCK_MONOTONIC_RAW CPU clock, here
we make the GPU clock sequence-scoped so that clock sync for all the
trace packets emitted with the same trusted_packet_sequence_id will be
done in an isolated manner (basically perfetto makes each scoped GPU
clock globally unique).
Meanwhile, since the clock is now sequence-scoped (unique per producer +
writer pair within the tracing session), we can simply pick 64 to start
with, and later extend to support multi-gpu (offset with primary minor).
Fixes: e278a89fdd ("panvk/perfetto: improve clock synchronization using CLOCK_MONOTONIC_RAW")
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37355>
Having a list of all enabled/used extensions in meson allows us to get
rid of a lot of boilerplate in every bvh build shader.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35326>
Macrotile arrays and Mlist were allocated together, but the Mlist BO
requires PVR_BO_ALLOC_FLAG_PM_FW_PROTECT (this is not clarified in the
uAPI documentation yet).
Split the buffers in two separate allocations and use the flag above
for the Mlist BO.
Fixes: 8991e64641 ("pvr: Add a Vulkan driver for Imagination Technologies PowerVR Rogue GPUs")
Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
Error value is now propagated correctly.
Fixes: 8991e64641 ("pvr: Add a Vulkan driver for Imagination Technologies PowerVR Rogue GPUs")
Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
This reverts commit 6619802446.
From testing, it is safe to revert this now as the driver can now do
dEQP-VK.image.mutable.* and VK_KHR_maintenance2 tests expect the
VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT set.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
Support for these formats was added as part of the work on Zink with the
PowerVR driver. However has caused a regression in deqp-vk because we can't
fully support A2s for rendering.
As other drivers do, restrict the use of this storage for only vertex
attributes.
Fix for deqp:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.2d.b4g4r4a4_unorm_pack16.a2b10g10r10_snorm*
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
Add unsigned texture state format for R16G16B16_UINT necessary for some type
of transfer operations, such as point filter and 48 bpp. For instance when
the driver does a CopyBufferToImage and supports R16G16B16_SINT it will use
R16G16B16_UINT for the memory transfer.
Fix for deqp:
dEQP-VK.pipeline.monolithic.sampler.view_type.1d.format.r16g16b16_sint.*
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
Co-authored-by: Simon Perretta <simon.perretta@imgtec.com>
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
This is needed in order for Zink to advertise DRM_PRIME_CAP_IMPORT &
DRM_PRIME_CAP_EXPORT for PIPE_CAP_DMABUF.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
In preparation to add more helpers, improve function names consistency.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
Make the naming consistent with the pbe partial render field and
with the pds pixel event partial render field.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
Do not split the creation of a load_op object and related shader, this
helps to prevent bugs especially in the clean up path.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
