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synced 2026-01-07 21:40:20 +01:00
pvr: Pass the PM/FW protect flag to the Mlist allocation
Macrotile arrays and Mlist were allocated together, but the Mlist BO
requires PVR_BO_ALLOC_FLAG_PM_FW_PROTECT (this is not clarified in the
uAPI documentation yet).
Split the buffers in two separate allocations and use the flag above
for the Mlist BO.
Fixes: 8991e64641 ("pvr: Add a Vulkan driver for Imagination Technologies PowerVR Rogue GPUs")
Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
This commit is contained in:
parent
a888889407
commit
aed7e7add1
1 changed files with 81 additions and 51 deletions
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@ -98,7 +98,8 @@ struct pvr_rt_dataset {
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struct pvr_winsys_rt_dataset *ws_rt_dataset;
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/* RT data information */
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struct pvr_bo *mta_mlist_bo;
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struct pvr_bo *mta_bo;
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struct pvr_bo *mlist_bo;
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struct pvr_bo *rgn_headers_bo;
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uint64_t rgn_headers_stride;
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@ -578,58 +579,82 @@ static void pvr_rt_get_region_headers_stride_size(
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*size_out = rgn_headers_size * layers;
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}
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static VkResult
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pvr_rt_mta_mlist_data_init(struct pvr_device *device,
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struct pvr_rt_dataset *rt_dataset,
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const struct pvr_free_list *global_free_list,
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const struct pvr_free_list *local_free_list,
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const struct pvr_rt_mtile_info *mtile_info)
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static VkResult pvr_rt_mta_data_init(struct pvr_device *device,
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struct pvr_rt_dataset *rt_dataset)
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{
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const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
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const uint32_t mta_size = rogue_get_macrotile_array_size(dev_info);
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const uint32_t num_rt_datas = ARRAY_SIZE(rt_dataset->rt_datas);
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pvr_dev_addr_t dev_addr;
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VkResult result;
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/* Valid case - see rogue_get_macrotile_array_size() */
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if (mta_size == 0) {
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rt_dataset->mta_bo = NULL;
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for (uint32_t i = 0; i < num_rt_datas; i++)
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rt_dataset->rt_datas[i].mta_dev_addr = PVR_DEV_ADDR_INVALID;
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return VK_SUCCESS;
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}
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result = pvr_bo_alloc(device,
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device->heaps.general_heap,
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mta_size * num_rt_datas,
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ROGUE_CR_PM_MTILE_ARRAY_BASE_ADDR_ALIGNMENT,
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PVR_BO_ALLOC_FLAG_GPU_UNCACHED,
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&rt_dataset->mta_bo);
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if (result != VK_SUCCESS)
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return result;
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dev_addr = rt_dataset->mta_bo->vma->dev_addr;
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for (uint32_t i = 0; i < num_rt_datas; i++) {
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rt_dataset->rt_datas[i].mta_dev_addr = dev_addr;
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dev_addr = PVR_DEV_ADDR_OFFSET(dev_addr, mta_size);
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}
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return VK_SUCCESS;
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}
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static void pvr_rt_mta_data_fini(struct pvr_rt_dataset *rt_dataset)
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{
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if (rt_dataset->mta_bo == NULL)
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return;
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for (uint32_t i = 0; i < ARRAY_SIZE(rt_dataset->rt_datas); i++)
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rt_dataset->rt_datas[i].mta_dev_addr = PVR_DEV_ADDR_INVALID;
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pvr_bo_free(rt_dataset->device, rt_dataset->mta_bo);
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rt_dataset->mta_bo = NULL;
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}
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static VkResult
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pvr_rt_mlist_data_init(struct pvr_device *device,
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struct pvr_rt_dataset *rt_dataset,
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const struct pvr_free_list *global_free_list,
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const struct pvr_free_list *local_free_list)
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{
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const uint32_t mlist_size =
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pvr_rt_get_mlist_size(global_free_list, local_free_list);
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uint32_t mta_size = rogue_get_macrotile_array_size(dev_info);
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const uint32_t num_rt_datas = ARRAY_SIZE(rt_dataset->rt_datas);
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uint32_t rt_datas_mlist_size;
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uint32_t rt_datas_mta_size;
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pvr_dev_addr_t dev_addr;
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VkResult result;
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/* No known cores where the Mlist size could be 0 */
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assert(mlist_size > 0);
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/* Allocate memory for macrotile array and Mlist for all RT datas.
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*
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* Allocation layout: MTA[0..N] + Mlist alignment padding + Mlist[0..N].
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*
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* N is number of RT datas.
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*/
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rt_datas_mta_size = ALIGN_POT(mta_size * num_rt_datas,
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ROGUE_CR_PM_MLIST0_BASE_ADDR_ALIGNMENT);
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rt_datas_mlist_size = mlist_size * num_rt_datas;
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result = pvr_bo_alloc(device,
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device->heaps.general_heap,
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rt_datas_mta_size + rt_datas_mlist_size,
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mlist_size * num_rt_datas,
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ROGUE_CR_PM_MTILE_ARRAY_BASE_ADDR_ALIGNMENT,
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PVR_BO_ALLOC_FLAG_GPU_UNCACHED,
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&rt_dataset->mta_mlist_bo);
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PVR_BO_ALLOC_FLAG_GPU_UNCACHED |
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PVR_BO_ALLOC_FLAG_PM_FW_PROTECT,
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&rt_dataset->mlist_bo);
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if (result != VK_SUCCESS)
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return result;
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dev_addr = rt_dataset->mta_mlist_bo->vma->dev_addr;
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for (uint32_t i = 0; i < num_rt_datas; i++) {
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if (mta_size != 0) {
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rt_dataset->rt_datas[i].mta_dev_addr = dev_addr;
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dev_addr = PVR_DEV_ADDR_OFFSET(dev_addr, mta_size);
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} else {
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rt_dataset->rt_datas[i].mta_dev_addr = PVR_DEV_ADDR_INVALID;
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}
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}
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dev_addr = PVR_DEV_ADDR_OFFSET(rt_dataset->mta_mlist_bo->vma->dev_addr,
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rt_datas_mta_size);
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dev_addr = rt_dataset->mlist_bo->vma->dev_addr;
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for (uint32_t i = 0; i < num_rt_datas; i++) {
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rt_dataset->rt_datas[i].mlist_dev_addr = dev_addr;
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@ -639,15 +664,13 @@ pvr_rt_mta_mlist_data_init(struct pvr_device *device,
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return VK_SUCCESS;
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}
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static void pvr_rt_mta_mlist_data_fini(struct pvr_rt_dataset *rt_dataset)
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static void pvr_rt_mlist_data_fini(struct pvr_rt_dataset *rt_dataset)
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{
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for (uint32_t i = 0; i < ARRAY_SIZE(rt_dataset->rt_datas); i++) {
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for (uint32_t i = 0; i < ARRAY_SIZE(rt_dataset->rt_datas); i++)
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rt_dataset->rt_datas[i].mlist_dev_addr = PVR_DEV_ADDR_INVALID;
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rt_dataset->rt_datas[i].mta_dev_addr = PVR_DEV_ADDR_INVALID;
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}
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pvr_bo_free(rt_dataset->device, rt_dataset->mta_mlist_bo);
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rt_dataset->mta_mlist_bo = NULL;
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pvr_bo_free(rt_dataset->device, rt_dataset->mlist_bo);
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rt_dataset->mlist_bo = NULL;
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}
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static VkResult
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@ -704,23 +727,29 @@ static VkResult pvr_rt_datas_init(struct pvr_device *device,
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{
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VkResult result;
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result = pvr_rt_mta_mlist_data_init(device,
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rt_dataset,
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global_free_list,
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local_free_list,
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mtile_info);
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result = pvr_rt_mta_data_init(device, rt_dataset);
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if (result != VK_SUCCESS)
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return result;
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result = pvr_rt_mlist_data_init(device,
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rt_dataset,
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global_free_list,
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local_free_list);
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if (result != VK_SUCCESS)
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goto err_pvr_rt_mta_data_fini;
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result =
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pvr_rt_rgn_headers_data_init(device, rt_dataset, mtile_info, layers);
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if (result != VK_SUCCESS)
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goto err_pvr_rt_mta_mlist_data_fini;
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goto err_pvr_rt_mlist_data_fini;
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return VK_SUCCESS;
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err_pvr_rt_mta_mlist_data_fini:
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pvr_rt_mta_mlist_data_fini(rt_dataset);
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err_pvr_rt_mlist_data_fini:
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pvr_rt_mlist_data_fini(rt_dataset);
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err_pvr_rt_mta_data_fini:
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pvr_rt_mta_data_fini(rt_dataset);
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return result;
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}
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@ -728,7 +757,8 @@ err_pvr_rt_mta_mlist_data_fini:
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static void pvr_rt_datas_fini(struct pvr_rt_dataset *rt_dataset)
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{
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pvr_rt_rgn_headers_data_fini(rt_dataset);
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pvr_rt_mta_mlist_data_fini(rt_dataset);
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pvr_rt_mlist_data_fini(rt_dataset);
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pvr_rt_mta_data_fini(rt_dataset);
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}
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static void pvr_rt_dataset_ws_create_info_init(
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