Qiang Yu
5c44404b5f
ac/llvm,radeonsi: lower nir_load_barycentric_at_sample in abi
...
RADV already did this in radv_lower_fs_intrinsics().
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21436 >
2023-02-27 09:39:41 +08:00
Konstantin Seurer
2d93ab795b
radv/rt: Pre shift cull_mask
...
This removes the need for masking the instance mask.
Totals from 14 (14.43% of 97) affected shaders:
CodeSize: 378696 -> 378308 (-0.10%); split: -0.12%, +0.02%
Instrs: 70854 -> 70855 (+0.00%); split: -0.02%, +0.02%
Latency: 1651235 -> 1651215 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 336290 -> 336285 (-0.00%); split: -0.00%, +0.00%
Copies: 9915 -> 9923 (+0.08%); split: -0.03%, +0.11%
PreSGPRs: 890 -> 896 (+0.67%)
PERCENTAGE DELTAS Shaders CodeSize Instrs Latency InvThroughput Copies PreSGPRs
q2rtx-pipe 48 -0.02% -0.02% -0.00% -0.00% -0.03% .
q2rtx_1 49 -0.10% +0.02% +0.00% +0.00% +0.14% +0.31%
-------------------------------------------------------------------------------------------
All affected 14 -0.10% +0.00% -0.00% -0.00% +0.08% +0.67%
-------------------------------------------------------------------------------------------
Total 97 -0.06% +0.00% -0.00% -0.00% +0.06% +0.16%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21530 >
2023-02-26 12:58:13 +00:00
Konstantin Seurer
13a9ce7f2f
radv/rt: Merge cull_mask and flags
...
Since cull_mask is only one byte, we can trivially store it in the same
register as the flags. This leaves us with a 2% performance gain in
Quake II RTX:
Totals from 7 (14.00% of 50) affected shaders:
VGPRs: 720 -> 688 (-4.44%)
CodeSize: 213052 -> 212980 (-0.03%); split: -0.05%, +0.02%
MaxWaves: 67 -> 70 (+4.48%)
Instrs: 39429 -> 39394 (-0.09%); split: -0.15%, +0.06%
Latency: 1096258 -> 1096943 (+0.06%); split: -0.05%, +0.11%
InvThroughput: 230661 -> 222963 (-3.34%); split: -3.42%, +0.08%
VClause: 1208 -> 1206 (-0.17%); split: -0.25%, +0.08%
Copies: 5321 -> 5269 (-0.98%); split: -1.22%, +0.24%
Branches: 1903 -> 1902 (-0.05%)
PreVGPRs: 650 -> 645 (-0.77%)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21470 >
2023-02-25 12:07:46 +00:00
Marek Olšák
9f1e6d8f70
nir,amd: add and use nir_intrinsic_load_esgs_vertex_stride_amd
...
This will emulate VGT_ESGS_RING_ITEMSIZE, which does the multiplication
for us. It's beneficial to stop setting VGT_ESGS_RING_ITEMSIZE to reduce
context rolls, and also the register will be removed in the future.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
5e837f9594
amd/gpu_info: add a workaround for SI_FORCE_FAMILY=gfx1100
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
df6380ddc9
amd: implement conformant TRUNC_COORD behavior for gfx11
...
For testing, the conformant behavior can be enabled by setting
conformant_trunc_coord to true manually and running this to enable
the conformant behavior in hw:
umr -w *.*.regTA_CNTL2 0x40000
The layer index rounding and TRUNC_COORD resetting workarounds can disabled
in the shader compiler.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
3e8bd05020
radeonsi: don't set PACKET_TO_ONE_PA for line stippling
...
A hw guy told me this.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
be8c61b4f6
amd/registers: only define SPI and COMPUTE registers in the 0xB000 range
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
80c0efa50f
amd: query the per-SIMD VGPR counts from the kernel, don't hardcode them
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
98eee7dee3
amd: replace SI_BIG_ENDIAN with UTIL_ARCH_BIG_ENDIAN
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
e0c8b24e22
amd/registers: unify VRS combiner definition names between gfx103 and gfx11
...
use gfx11 names
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
091268944d
amd,radeonsi: remove unused LLVM functions
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:24 +00:00
Marek Olšák
34c01cf718
amd: bump AMD_MAX_SE and change the CU mask type to 16 bits
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:23 +00:00
Marek Olšák
63b21e3066
amd: add missing gfx11 register definitions
...
Fixes: caa09f66aehttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:23 +00:00
Marek Olšák
ac0e83375a
amd: fix LOD_BIAS on gfx6-9 and adjust the lod bias CAP
...
Fixes: e673bb4ae4https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:23 +00:00
Marek Olšák
fb70d8cf9c
Revert "radeonsi/ci: Update stoney test expectations"
...
This reverts commit 53cc509288https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525 >
2023-02-24 21:27:23 +00:00
Faith Ekstrand
96c832c47e
spirv: Always emit deref_buffer_array_length intrinsics
...
All the drivers have been converted to setting this option now except
imagination and they don't support SSBOs yet.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3993
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446 >
2023-02-24 20:37:10 +00:00
Konstantin Seurer
e2fa9ba9c6
radv: Use indirect header filling for compact builds
...
Sets the accel struct size fields to the correct values which should
allow for more compaction.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
40e9efa2de
radv/bvh: Add a shader for filling the header
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
c83ea20683
radv/bvh: Move the size header field up
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
b0fd43f1f7
radv: Move the geometry infos before the BVH
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
0800450cb9
radv: Use compact encoding
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
07c1b23022
radv/bvh: Implement compact encoding
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
71ccc8d600
radv: Add a build config for compact builds
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
da4f498f6f
radv/bvh/encoder: Move dst_node initialization into the loop
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
2792d012d2
radv/bvh/encode: Introduce is_root_node
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
2c0e158ae2
radv/bvh/encode: Move bvh_offset NULL check to the top of the loop
...
NULL nodes don't have to be encoded and they also don't carry over any
information to their children.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
4e87a01b93
radv/bvh: Replace is_final_tree with bvh_offset
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Konstantin Seurer
688f598237
radv/bvh/encode: Use the node type for identifying internal nodes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818 >
2023-02-24 15:14:40 +00:00
Samuel Pitoiset
d2ff8b673a
radv: advertise VK_EXT_image_sliced_view_of_3d on GFX10+
...
Pass dEQP-VK.pipeline.monolithic.sliced_view_of_3d_image.* on NAVI21.
Looks like older generations can't support it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359 >
2023-02-24 14:12:22 +00:00
Samuel Pitoiset
5520a40e05
radv: implement VK_EXT_image_sliced_view_of_3d on GFX10+
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359 >
2023-02-24 14:12:22 +00:00
Samuel Pitoiset
e82c11df66
ac/nir: add resinfo lowering for sliced storage 3D views
...
The first layer isn't necessarily 0 and depth shouldn't be minified.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359 >
2023-02-24 14:12:22 +00:00
Bas Nieuwenhuizen
ed76833705
radv: Implement & expose VK_EXT_pipeline_library_group_handles.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406 >
2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen
d0f7587109
radv: Use group handles based on shader hashes.
...
Should be stable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406 >
2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen
913de78731
radv: Use provided handles for switch cases in RT shaders.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406 >
2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen
430170702e
radv: Hash group handles as part of RT pipeline key.
...
So that we can start varying them to avoid collisions while keeping
handles stable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406 >
2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen
9eb76ab638
radv: Add helper to hash stages.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406 >
2023-02-23 22:17:30 +00:00
Eric Engestrom
fbd644c59d
meson: replace vk_wsi_args with dependencies to let meson take care of transitivity
...
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19497 >
2023-02-23 09:42:46 +00:00
Rhys Perry
94abccf3ce
aco: fix pathological case in LdsDirectVALUHazard
...
Similar to bfd4ac4581296b4d95a3https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21423 >
2023-02-22 20:46:12 +00:00
Georg Lehmann
ee47cc8256
amd,nir: remove byte_permute_amd intrinsic
...
It's unused and if we ever want to use it again we should make it an alu
opcode instead.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21445 >
2023-02-22 20:13:52 +00:00
Samuel Pitoiset
7f2775bc8a
radv/ci: cleanup CI lists for dEQP-VK.memory.* tests that timeout
...
These tests usually take more than 30s to complete, so exclude them
completely instead. This should also make runs slightly faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21464 >
2023-02-22 13:25:13 +00:00
Konstantin Seurer
4d2a7ea146
radv: Use vk_acceleration_structure
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21047 >
2023-02-22 11:58:57 +00:00
Samuel Pitoiset
1583b150d6
radv: set VS_OUT_MISC_SIDE_BUS_ENA for clip distances on GFX10.3+
...
On GFX10.3, all auxiliary position exports are optimized, so set it
for clip/cull distances. Both RadeonSI and llpc set it too.
Suggested by Marek.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21439 >
2023-02-22 07:17:33 +00:00
Konstantin Seurer
af19762935
radv/rt: Skip instances after loading the entire node
...
This avoids waiting for instance_data which can improve performance:
vk_ray_tracing_ao_KHR_app: 0.2% (The TLAS has 2 instances)
Quake II RTX: 1%
Control: 1%
We also have to shuffle around some code to avoid increasing VGPR usage.
That leaves us with the following stats:
Quake II RTX:
Totals from 7 (14.29% of 49) affected shaders:
CodeSize: 165612 -> 165716 (+0.06%)
Instrs: 31446 -> 31460 (+0.04%)
Latency: 596709 -> 554292 (-7.11%)
InvThroughput: 121998 -> 113327 (-7.11%)
VClause: 596 -> 587 (-1.51%)
Copies: 4664 -> 4646 (-0.39%)
PreVGPRs: 620 -> 639 (+3.06%)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21421 >
2023-02-21 15:51:14 +00:00
Rhys Perry
ab3184c0a2
aco: don't apply modifiers through DPP to unsupported instructions
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21201 >
2023-02-21 14:59:38 +00:00
Georg Lehmann
3bd5b583f9
aco: combine a ^ ~b and ~(a ^ b) to v_xnor_b32
...
Foz-DB Navi21:
Totals from 13 (0.01% of 134913) affected shaders:
CodeSize: 225432 -> 225180 (-0.11%)
Instrs: 41973 -> 41908 (-0.15%)
Latency: 297464 -> 297326 (-0.05%)
InvThroughput: 82536 -> 82467 (-0.08%)
Copies: 2452 -> 2440 (-0.49%)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21410 >
2023-02-21 13:35:31 +00:00
Daniel Schürmann
2bb369dd8d
nir: add assertions that loops don't have a Continue Construct
...
Hoping that I didn't miss any, this *should* add assertions
to all functions and passes which explicitly handle 'nir_loop'.
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962 >
2023-02-21 10:41:11 +00:00
Samuel Pitoiset
ad459054ed
radv: enable SQTT tracing on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338 >
2023-02-21 07:28:49 +00:00
Samuel Pitoiset
dfa9b5d624
radv: disable SPM counters with RGP on GFX11
...
They are likely different and perfcounters aren't defined on GFX11 yet.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338 >
2023-02-21 07:28:49 +00:00
Samuel Pitoiset
5fe48baad6
radv: implement a workaround for SQTT on GFX11
...
Found in AMDVLK, see the comment below for an explanation.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338 >
2023-02-21 07:28:49 +00:00
