Commit graph

11801 commits

Author SHA1 Message Date
Daniel Schürmann
5c362cde33 radv: update PS num_vgprs in case of epilogs rather than overallocating VGPRs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:43 +00:00
Daniel Schürmann
4c7a5b1e51 aco: don't use shared VGPRs for shaders consisting of multiple binaries
When using multiple binaries, we don't know the required number of VGPRs beforehand,
which means we either have to over-allocate VGPRs or avoid shared VGPRs.
As bpermute is the only instructions needing shared VGPRs, we decide for the latter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:43 +00:00
Daniel Schürmann
37df8edf34 aco/ra: adjust_max_used_regs() for fixed Operands
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:43 +00:00
Daniel Schürmann
8c68aba678 aco: split ps_epilog args before exporting them
This avoids some unnecessary copies from extracting from the input vectors.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:42 +00:00
Collabora's Gfx CI Team
91b06ea8b2 Uprev Piglit to 2391a83d1639a7ab7bbea02853b922878687b0e5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22279>
2023-04-04 15:37:14 +00:00
Samuel Pitoiset
c5b7efa293 radv: enable shaders cache for libraries with GPL
This was the last missing feature for GPL. The main problem is that
the on-disk shaders cache size will increase a lot because we don't
deduplicate shaders but there is on-going work to improve that.

We also can't use the shaders cache for libraries created with the
RETAIN_LINK_TIME_OPTIMIZATION flag and module identifiers because we
don't know the SPIR-V and thus can't retain NIR shaders for linking.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
03d2bd6042 radv: ensure to retain NIR shaders for GPL libs found in the cache
Even if we are able to get the assembly from the shaders cache for
graphics pipeline libraries, we still need to retain NIR shaders in
case the LTO pipelines won't be find in the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
5e62d8d1bd radv: add VkGraphicsPipelineLibraryFlag to the graphics pipeline key
This is to generate a different key for a library created with
FRAGMENT_SHADER_BIT and no FS (ie. it would generate a noop FS) and
a library created with FRAGMENT_OUTPUT_INTERFACE with no CB attachments.

Otherwise, the same key would be generated and this would corrupt
the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
47c0820dc7 radv: remove dead code in radv_pipeline_get_nir()
We either import the NIR or the assembly, so this was never reached.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
a9529d9644 radv: allow to create/insert PS epilogs from/to the cache for libs
To cache PS epilogs compiled inside graphics pipeline libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
ba967e1a28 radv: rely on non-NULL binaries when inserting shaders to the cache
With GPL, a stage can be imported from a library which means that the
binary is NULL (it's freed right after compilation) but the shader is
non-NULL. To avoid crashing, rely on non-NULL binaries because this
implies that the shader is non-NULL as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
1239fcab4d radv: only copy non-NULL shaders when loaded from the cache
With GPL, we don't necessarily load all stages from the same cache
entry and other stages might have been imported from libraries, so
don't overwrite them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
9582c1e52a radv/ci: add one more flake
This one is randomly failing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22258>
2023-04-03 17:20:13 +00:00
Rhys Perry
f92994bb83 radv/gfx11: improve RT scratch allocation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22232>
2023-04-03 16:35:17 +00:00
Timur Kristóf
50e9a8f7c2 radv: Use linear_dispatch info in GFX11 task/mesh draw packet.
This helps the CP (command processor) optimize mesh shader
dispatch when Y = Z = 1.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22222>
2023-04-03 15:36:02 +00:00
Timur Kristóf
836204da25 aco: Better phi lowering for merge block when else-side is const.
Add a new special case for binary merge blocks to boolean
phi lowerig. This special case benefits shaders that
have divergent branches with an empty else block,
for example all NGG culling shaders.

Fossil DB stats on Rembrandt (NGG culling enabled):

Totals from 61778 (45.79% of 134913) affected shaders:
SpillVGPRs: 2268 -> 2284 (+0.71%); split: -1.10%, +1.81%
CodeSize: 164317952 -> 162962772 (-0.82%); split: -0.83%, +0.00%
Instrs: 31249824 -> 30910686 (-1.09%); split: -1.09%, +0.00%
Latency: 154948555 -> 154781097 (-0.11%); split: -0.12%, +0.02%
InvThroughput: 30397664 -> 30370872 (-0.09%); split: -0.13%, +0.04%
VClause: 529239 -> 529229 (-0.00%); split: -0.00%, +0.00%
SClause: 783417 -> 783430 (+0.00%)
Copies: 2627570 -> 2595161 (-1.23%); split: -1.25%, +0.02%
Branches: 976506 -> 976508 (+0.00%); split: -0.00%, +0.00%

Fossil DB stats on GFX11 (NGG culling disabled):

Totals from 895 (0.66% of 134913) affected shaders:
SpillVGPRs: 2258 -> 2322 (+2.83%); split: -0.44%, +3.28%
CodeSize: 6229152 -> 6215880 (-0.21%); split: -0.37%, +0.16%
Scratch: 216576 -> 215808 (-0.35%); split: -0.47%, +0.12%
Instrs: 1202077 -> 1198396 (-0.31%); split: -0.43%, +0.13%
Latency: 15921336 -> 16000561 (+0.50%); split: -0.74%, +1.24%
InvThroughput: 7425765 -> 7474891 (+0.66%); split: -0.67%, +1.33%
VClause: 22976 -> 23008 (+0.14%); split: -0.03%, +0.17%
SClause: 38269 -> 38271 (+0.01%)
Copies: 123244 -> 123896 (+0.53%); split: -0.30%, +0.83%
Branches: 47570 -> 47574 (+0.01%); split: -0.00%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
81b4806d64 aco: Call dominator_tree before lower_phis.
This just makes it possible to use the dominator
tree information during phi lowering.

No Fossil DB changes on GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
0eb7c49c7f aco: Pop branch operands when targets are same in SSA elimination.
The branch instruction is no longer conditional when the targets are the
same, so the operand is not necessary and can be removed.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
739bd03c37 aco: Don't verify branch exec read when eliminating exec writes.
Verifying that the branch instruction reads exec is not actually
necessary because the pattern that we look for already implies that.

This prepares for the next commit which will remove the exec operand
from branches that have the same target. These branches will no
longer read exec, but they should still get the same optimization.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
9eb04d8f96 aco: Simplify get_phi_operand using Operand::c32_or_c64.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
0211e66f65 aco: Don't remove exec writes that also write other registers.
Don't eliminate an instruction that writes registers other than exec and scc.
It is possible that this is eg. an s_and_saveexec and the saved value is
used by a later branch.

Fixes: bc13049747
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
54da863956 aco: Consider p_cbranch_nz as divergent branch too.
A p_cbranch_nz instruction that reads exec is divergent too.

Fixes: f030b75b7d
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Tatsuyuki Ishi
7fe469d6c8 radv: Pre-compute descriptor set layout hash.
While analyzing cache loading performance, hashing the pipeline layout was
surprisingly consuming around 4% of time, sometimes close to the cost of
hashing shader modules.

Turns out we were hashing the pipeline layout on every pipeline creation.
Considering that pipeline layouts are usually deduplicated by the
application, this was amplifying the hashing cost by a big margin.

With Graphics Pipeline Library, we do need to rebuild the pipeline layout
by combining those from each library, but we can memoize the hash of the
descriptor set layout. The cost of re-hashing hashes is negligible since
each descriptor set layout can amount to 1–2KB in size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22254>
2023-04-03 08:46:08 +00:00
Qiang Yu
7be81a680b ac/llvm: remove ac_build_opencoded_load_format
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
2023-04-03 01:35:06 +00:00
Qiang Yu
1165758b8b ac/llvm,radeonsi: remove abi->load_inputs implementation
No nir_load_input in VS now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
2023-04-03 01:35:06 +00:00
Qiang Yu
531acf548a ac/llvm: move ac_fixup_ls_hs_input_vgprs to amd common
To be shared with radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
2023-04-03 01:35:06 +00:00
Qiang Yu
297f97a42b ac/llvm: vs_rel_patch_id can also be fixed up
It's currently used when LS store output to LDS.
The LS/HS bug fix seems does not affect this case.
But we'd better treat it as other fixed args.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
2023-04-03 01:35:06 +00:00
Qiang Yu
003d84b660 ac/nir: add ac_nir_load_arg_at_offset
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
2023-04-03 01:35:06 +00:00
Timur Kristóf
4de9a4b2b8 ac/nir: When task->mesh dispatch Y or Z are 0, also set X to 0.
AMD recommends doing this to speed up the CP when it processes
the draw ring entries. LLPC also does this.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22211>
2023-04-01 14:46:50 +00:00
Timur Kristóf
4683b21399 ac/nir: Store only lowest 8 bits for task draw ring DWORD3.
When writing the draw ready bit, don't write the high 24 bits
of DWORD3, because that is used by the HW for something else
according to LLPC.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22211>
2023-04-01 14:46:50 +00:00
Rhys Perry
6974e5479c aco: fix nir_var_shader_out barriers for task shaders
These will be used in a future commit.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22211>
2023-04-01 14:46:50 +00:00
Rhys Perry
0f60c18f29 aco: don't optimize s_or_b64(v_cmp_u_f32(a, b), cmp(a, a))
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22214>
2023-03-31 19:41:54 +00:00
Konstantin Seurer
7b837531e8 radv/ci: Update ray tracing pipeline fail/skip lists
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22018>
2023-03-31 19:05:17 +00:00
Samuel Pitoiset
e98aded527 radv: fix binding raytracing/compute pipelines
If a compute pipeline is bound after a raytracing pipeline, the
computes shader slot (aka RT prolog) will be overwritten.

To fix this, move the RT prolog outside of the compute shader slot.

Fixes: d109362a3d ("radv: copy bound shaders to the cmdbuf state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22235>
2023-03-31 18:29:05 +00:00
Samuel Pitoiset
56493a5f8a radv: add the raygen shader BO to the cmdbuf list
Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22235>
2023-03-31 18:29:05 +00:00
Timur Kristóf
115958b6f0 ac/nir/ngg: Slightly improve attribute ring offset calculation.
Inspired by Nicolai Hähnle's commit in LLPC.
Instead of using a SALU instruction to add to the scalar
offset, rely on the buffer swizzling and use constant offset.

Fossil DB stats on GFX1100:

Totals from 47910 (35.51% of 134913) affected shaders:
CodeSize: 87927612 -> 86968136 (-1.09%)
Instrs: 17584007 -> 17440094 (-0.82%)
Latency: 97232173 -> 97126311 (-0.11%)
InvThroughput: 9904586 -> 9905288 (+0.01%); split: -0.02%, +0.02%
VClause: 544430 -> 542566 (-0.34%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22227>
2023-03-31 17:02:17 +00:00
Timur Kristóf
61003e3600 radv: Use radv_get_shader to get vertex shader when binding pipeline.
The shaders[MESA_SHADER_VERTEX] can be NULL for merged shaders.

Fixes: b2ac40e734
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8749
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22229>
2023-03-31 16:42:39 +00:00
Samuel Pitoiset
f8558d1fb5 radv: configure PA_SC_MODE_CNTL_1 during cmdbuf recording
Two graphics pipeline parameters need to be copied to the cmdbuf
state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22218>
2023-03-31 16:07:11 +00:00
Samuel Pitoiset
66da73e863 radv: set PS_ITER_SAMPLE(1) for sample shading during cmdbuf recording
This shouldn't be configured in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22218>
2023-03-31 16:07:11 +00:00
Samuel Pitoiset
b750fe4c6a radv: copy db_render_control to the cmdbuf state
This register is only used for meta operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22218>
2023-03-31 16:07:11 +00:00
Faith Ekstrand
b16cfe23ef vulkan,anv,hasvk,radv: Unify Android hardware buffer creation
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22038>
2023-03-31 14:57:03 +00:00
Faith Ekstrand
d75f797246 radv: Set vk_image.ahardware_buffer_format
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22038>
2023-03-31 14:57:03 +00:00
Faith Ekstrand
41f88be282 vulkan,anv,hasvk,radv: Add a common vk_image_usage_to_ahb_usage helper
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22038>
2023-03-31 14:57:03 +00:00
Friedrich Vock
b8ee90188b radv: Work around use-after-free compiler errors
Fixes: 4dafb69d ("radv/rt: defer library_pipeline allocation")
Tested-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21981>
2023-03-31 08:52:16 +00:00
Samuel Pitoiset
56b98bb36d radv: add dynamic support for rectangles enable/mode
This is in VK_EXT_discard_rectangles version 2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21360>
2023-03-31 07:59:18 +00:00
Samuel Pitoiset
552f877b2d radv: fix sample shading when a new fragment shader is bound
Sample shading can be enabled from the pipeline and from the fragment
shader, in that case we need to re-emit some states.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22215>
2023-03-31 07:09:15 +00:00
Konstantin Seurer
f6147051e2 radv: Stop counting user SGPRS separately
Renames radv_declare_shader_args to declare_shader_args and runs it
twice to first gather the user SGPR count without push constants and
descriptor sets.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22119>
2023-03-30 21:52:03 +00:00
Konstantin Seurer
0c915ba501 radv: Set user SGPR locations when declaring args
Merge shader arg declaration with setting up the user data locations.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22119>
2023-03-30 21:52:03 +00:00
Samuel Pitoiset
373c6346f5 radv: add push constant state to the cmdbuf state
Push constants are handled per bind point internally. Using a separate
structure in the cmdbuf state would allow us to update it easily
without relying on bound pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22209>
2023-03-30 20:41:23 +00:00
Samuel Pitoiset
a0baefa033 radv: copy need_indirect_descriptor_sets to radv_cmd_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22209>
2023-03-30 20:41:23 +00:00