Commit graph

85652 commits

Author SHA1 Message Date
Rob Clark
8824a765a2 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:23:41 -04:00
Rob Clark
476551a21f freedreno/a3xx: move where we deal w/ binning FS
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:23:41 -04:00
Rob Clark
dd9135c452 freedreno/a4xx: move where we deal w/ binning FS
Move where we pick dummy FS for binning pass, so the whole driver sees
the same dummy/no-op FS stage.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:23:41 -04:00
Rob Clark
09b3447344 freedreno/a3xx: constify the shader variants
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:23:41 -04:00
Rob Clark
5b955f09f7 freedreno/a4xx: constify the shader variants
Most of the driver just needs read-only access, so constify..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:23:40 -04:00
Rob Clark
d9395e4ed8 freedreno/a3xx: remove duplicate mark of end of binning cmds
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:23:40 -04:00
Nicolai Hähnle
28d2a7e67c radeonsi: avoid crash when a sampler state is bound for a buffer texture
Sampler states don't really make sense with buffer textures, but they
can be set anyway, so we need to be defensive here. This bug was lurking
for a while and was finally noticed due to PBO uploads setting sampler
states.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94284
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Laurent Carlier <lordheavym@gmail.com>
Tested-by: Shawn Starr <shawn.starr@rogers.com>
2016-03-13 09:37:23 -05:00
Matt Turner
61b10b4eb7 i965: Use foreach_in_list_reverse_safe() macro.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-03-12 19:23:50 -08:00
Jason Ekstrand
98d58e7320 nir/clone: Add support for cloning a single function_impl
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jason Ekstrand
036b209484 nir/validate: Better function validation
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jason Ekstrand
f86f3c90aa nir/print: Better function argument printing
Since we aren't going to put the function parameters or the return variable
in the list of locals, it won't get a proper declaration.  This changes
nir_print to print the type along with each parameter or return variable.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jason Ekstrand
13969565f9 nir/print: Factor variable name lookup into a helper
Otherwise, we have a problem when we go to print functions with arguments
because their names get added to the hash table during declaration which
happens after we print the prototype.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jason Ekstrand
e4bebe8a02 nir: Create function parameters in function_impl_create
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jason Ekstrand
066d3c115e nir: Add a helper for creating a "bare" nir_function_impl
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jason Ekstrand
2ef4754a20 nir: Add a new "param" variable mode for parameters and return variables
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jason Ekstrand
41ae553fda nir/glsl: Remove dead function parameter handling code
NIR has never been used on IR where we haven't already done function
inlining so this code has been dead from the beginning.  Let's just get rid
of it for now.  We can always put it back in if we decide to use NIR for
function inlining at some point in the future.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 15:48:36 -08:00
Jordan Justen
b83785d86d anv/gen7: Add stall and flushes before switching pipelines
This is a port of 18c76551ee from OpenGL
to Vulkan.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 13:13:37 -08:00
Jordan Justen
c8ec65a1f5 anv: Add flush_pipeline_before_pipeline_select
flush_pipeline_before_pipeline_select adds workarounds required before
switching the pipeline.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 13:13:37 -08:00
Jordan Justen
1b126305de anv/genX: Add flush_pipeline_select_gpgpu
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 12:43:46 -08:00
Jason Ekstrand
41af9b2e51 HACK: Don't re-configure L3$ in render stages pre-BDW
This fixes a "regression" on Haswell and prior caused by merging the gen7
and gen8 flush_state functions.  Haswell should still work just fine if
you're on a 4.4 kernel, but we really should make it detect the command
parser version and do something intelligent.
2016-03-12 08:57:16 -08:00
Boyuan Zhang
6cf120ec77 st/va: add HEVC main 10 profile
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-11 22:33:56 -05:00
Boyuan Zhang
06c862d67d radeon/video: enable HEVC main 10 decode
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-11 22:33:56 -05:00
Boyuan Zhang
8be9efcce7 radeon/uvd: handle HEVC main 10 decode
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-11 22:33:56 -05:00
Jason Ekstrand
753ebe4457 anv/x11: Reset the SHM fence before presenting the pixmap
This seems to fix the flicker issue that I was seeing with dota2
2016-03-11 17:22:46 -08:00
Kristian Høgsberg Kristensen
9bff5266be anv/x11: Add present support
The old DRI3 implementation just used CopyArea instead of present.  We
still don't support all the MST fancyness, but it should at least avoid
some copies and allow for.

v2 (Jason Ekstrand):
   - Better object cleanup and destruction
   - Handle the CONFIGURE_NOTIFY event and return OUT_OF_DATE when needed
   - Track dirtyness via IDLE_NOTIFY rather than interating through the
     images sequentially
2016-03-11 16:54:17 -08:00
Jason Ekstrand
e920b184e9 anv/x11: Split image creation into a helper function
This lets us clean up error handling and make it correct.
2016-03-11 12:28:34 -08:00
Jason Ekstrand
41a147904a anv/wsi: Throttle rendering to no more than 2 frames ahead
Right now, Vulkan apps can pretty easily DOS the GPU by simply submitting a
lot of batches.  This commit makes us wait until the rendering for earlier
frames is comlete before continuing.  By waiting 2 frames out, we can still
keep the pipe reasonably full but without taking the entire system down.
This is similar to what the GL driver does today.
2016-03-11 11:31:13 -08:00
Jason Ekstrand
132f079a8c anv/gem: Use C99-style struct initializers for DRM structs
This is more consistent with the way the rest of the driver works and
ensures that all structs we pass into the kernel are zero'd out except for
the fields we actually want to fill.  We were previously doing then when
building with valgrind to keep valgrind from complaining.  However, we need
to start doing this unconditionally as recent kernels have been getting
touchier about this.  In particular, as of kernel commit b31e51360e88 from
Chris Wilson, context creation and destroy fail if the padding bits are not
set to 0.
2016-03-11 11:31:03 -08:00
Ben Widawsky
d1ab544bb8 i965/chv: Display proper branding
"Braswell" is a Cherryview based *thing*. It unfortunately requires extra
information to determine its marketing name. Unlike all previous products, and
hopefully all future ones, there is no unique 1:1 mapping of PCI device ID to
brand string.

I put up a fight about adding any complexity to our GL renderer string code for
a very long time. However, a wise man made a comment to me that I couldn't argue
with: if a user installs Windows on their hardware, the brand string should be
the same as what we display in Linux. The Windows driver apparently does this
check, so we should too.

Note that I did manage to find a good use for this info anyway in the compute
shader thread counts.

v2: memcpy instead of strncpy, and some minor changes (Matt)

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com
2016-03-11 11:17:28 -08:00
Ben Widawsky
5e6a43a001 i965/chv: Update lower min for CS threads
We have better information now, and 28 was not a valid thing to support. 6 EUs
per sublice with 7 threads per EU is the minimum supported config.

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com
2016-03-11 11:17:28 -08:00
Ben Widawsky
3dc3dbc8d8 i965/chv: Check that compute threads are above threshold
The way we are organizing this code, the statically configured max_cs_threads
should always be the minimum value we actually support (ie. are aware of). As a
result, we can fall back to that if we get invalid numbers from the kernel (ie.
when the query succeeds, but the result is lower than expected).

I was originally planning to use an assert, but there is no reason to be so
mean.

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com
2016-03-11 11:17:28 -08:00
Ben Widawsky
9dd20b715a i965/chv: Use kernel provided info for max_cs_threads
With the previous patches, the code can find out the actual number of available
compute threads. It is enabled only for Cherryview since that is the only
platform I know for a fact has shipped devices which can benefit from this.  It
seems like other platforms /might/ benefit from this because of fused
configurations which /might/ have shipped. Fallback code is still there.

v2: Some minor adjustments from Matt

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com
2016-03-11 11:17:28 -08:00
Ben Widawsky
38eb606884 i965: Query and store GPU properties from kernel
Certain products are not uniquely identifiable based on device id alone. The
kernel exports an interface to help deal with this. This patch merely introduces
the consumer of the interface and makes sure nothing breaks.

It is also possible to use these values for programming GPGPU mode, and I plan
to do that as well.

The interface was introduced in libdrm 2.4.60, which is already required, so it
should all be fine.

v2: Some minor changes recommended by Matt

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-11 11:17:28 -08:00
Nicolai Hähnle
9908b13af6 st/mesa: check that the image unit is valid in st_bind_images
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-03-11 11:53:40 -05:00
Bas Nieuwenhuizen
417b6721a0 radeonsi: Lazily re-set sampler views after disabling DCC
Clear DCC flags if necessary when binding a new sampler view.

v2: Do not reset DCC flags of bound sampler views.
v3: Check that we have a real texture (Nicolai)

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-03-11 11:51:15 -05:00
Marek Olšák
af3454cad5 st/mesa: remove ST_NEW_MESA flag (v2)
Only used indirectly when checking dirty.st != 0

v2: also update st_cb_compute.c

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-03-11 16:07:18 +01:00
Nicolai Hähnle
e502801d98 r600g: clear compressed_depthtex/colortex_mask when binding buffer texture
Found by inspection of the source based on a bisected bug report.

This bug has been in the code for a long time, but the more recent PBO upload
feature exposed it because it leads to more uses of buffer textures.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94388
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "11.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
2016-03-11 08:00:15 -05:00
Ilia Mirkin
f8ea98e4ec st/mesa: add GL_ARB_shader_atomic_counter_ops support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-03-10 22:36:17 -05:00
Ilia Mirkin
075a5742bf mesa: add GL_ARB_shader_atomic_counter_ops support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-03-10 22:34:46 -05:00
Ilia Mirkin
a8819fb1ff nvc0: add support for TGSI FMA ops
This will allow the nouveau backend to not try and split up ops that are
fused in GLSL.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2016-03-10 22:34:28 -05:00
Nicolai Hähnle
59c5508b9a radeonsi: update compressed_colortex_masks when a cmask is created or disabled
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-03-10 18:22:52 -05:00
Nicolai Hähnle
da68a9b215 radeonsi: move si_decompress_textures to si_blit.c
Since it is all about calling into blitter functions, it makes more
sense here. This change also reduces the size of the interfaces between
.c files.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-03-10 18:22:49 -05:00
Nicolai Hähnle
f03c9e5692 r600g: update compressed_colortex_masks when a cmask is created or disabled
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-03-10 18:22:46 -05:00
Nicolai Hähnle
784269aa40 gallium/radeon: notify all contexts when cmasks are enabled/disabled
There is an annoying corner case that I stumbled across while looking into
piglit's arb_shader_image_load_store/execution/load-from-cleared-image.shader_test
(which can be easily adapted to demonstrate the bug without the
ARB_shader_image_load_store extension)

When we bind a texture and then clear it using glClear (by attaching it
to the current framebuffer) for the first time, we allocate a separate
cmask for the texture to do fast clear, but the corresponding bit in
compressed_colortex_mask is not set. Subsequent rendering will use
incorrect data.

Conversely, when a currently bound texture with an existing cmask is
exported leading to that cmask being disabled, the compressed_colortex_mask
bit will remain set, leading to an assertion later on in debug builds.

Since iterating through all contexts and/or remembering where every
texture is bound would be costly, and cmask enable/disable should be
rare, we will maintain a global counter to signal contexts that they
must update their compressed_colortex_masks.

This patch introduces the global counter, and subsequent patches will
do the mask update.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-03-10 18:22:00 -05:00
Kenneth Graunke
9ea00c6f6b i965: Set a proper _BaseFormat for window system renderbuffers in ES.
intel_alloc_private_renderbuffer_storage did:

   rb->_BaseFormat = _mesa_base_fbo_format(ctx, internalFormat);

Unfortunately, internalFormat was usually an unsized format (such as
GL_DEPTH_COMPONENT).  In OpenGL ES, _mesa_base_fbo_format() refuses to
accept unsized formats, and returns 0 rather than a real base format.

This meant that we ended up with a completely bogus rb->_BaseFormat for
window system buffers on OpenGL ES.  All other renderbuffer allocation
functions in intel_fbo.c instead use the mesa_format, and do:

   rb->_BaseFormat = _mesa_get_format_base_format(...);

We can do likewise, using rb->Format.  This appears to work just fine.

dEQP-GLES3.functional.state_query.fbo.framebuffer_attachment_x_size_initial
failed, as it tried to perform a GL_FRAMEBUFFER_ATTACHMENT_DEPTH_SIZE query
on the window system depth buffer.  That query relies on a proper
rb->_BaseFormat being set, so it broke because rb->_BaseFormat was 0 due
to the above bug.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94458
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-03-10 11:23:52 -08:00
Kenneth Graunke
e032e4ad5a glcpp: Fix locations when encounting "#<NEWLINE>".
We were failing to reset our location tracking when encountering a
NEWLINE in the <HASH> state.  Rip the code from the <*>{NEWLINE} rule,
which handles this properly.

Also, update 146-version-first-hash.c to have proper expectations.
When I introduced the test, I didn't verify that the line/column
numbers were correct, and it turns out they varied based on the type
of newline ending.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94447
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-03-10 11:23:26 -08:00
Jason Ekstrand
1f3d582cba isl/surface_state: Set the clear color 2016-03-10 10:41:52 -08:00
Jason Ekstrand
8c819b8c2b genxml/gen75: Add the clear color bits to RENDER_SURFACE_STATE 2016-03-10 10:41:52 -08:00
Jason Ekstrand
6f47ed28b4 isl: Add more helpers for determining if a format is an integer format 2016-03-10 10:41:52 -08:00
Jason Ekstrand
b0e423cc4f isl: Remove redundant check
The green channel was checked twice.
2016-03-10 10:41:52 -08:00