The spv cap has the correct requirements to be satisfied before an app
can use it, so we can drop the redundant check here to be more robust.
Either of below is needed:
- VkPhysicalDeviceFeatures::shaderStorageImageReadWithoutFormat
- VK_VERSION_1_3
- VK_KHR_format_feature_flags2
v2: dropped unused variable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28117>
Convert licensing information using ISO/IEC 5962:2021 to SPDX format.
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: lorn10 <kle@bluewin.ch>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27971>
Without setting BO_ALLOC_NO_SUBALLOC iris_bo_alloc() will attempt to
get bo from slabs again.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27734>
No idea what was the original purpose, but in the imported code we don't
need any of that.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27853>
Now with the immediate flag being removed, we can rely on this and drop
some code.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27853>
It was always set to true.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27853>
Most of the code is copied as is, but there are a couple of changes:
- drop pre nvif code
- nouveau_list -> list_head
- pthread_mutex_t -> simple_mtx_t
- nvif_unwrap removed
- no assignments in if statements
- nouveau_object_mthd -> nouveau_device_info
- reworked object allocation UAPI calls
Most of the reworked code was copied from NVK or a previous version of it
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27853>
There's no good reason we want to read RGBA for SNORM RB textures. Let's
correct the preferred read-format here.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28120>
Change wrap_surface to always take the ownership of the wrapped surface and
always check for an allocated value to make sure to not crash here.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28025>
The `stride` and `offset` attributes are meaningful for the "virtual"
register files (VGRFs, UNIFORMs and ATTRs). Accumulator is an ARF so
validation should check `hstride` (part of the <V,W,H> triple) and `subnr`
instead.
Fixes: 12d7aaf2b8 ("intel/compiler: add more validation for acc register usage")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28059>
This ensure the region triple <V,W,H> is set correctly, in this case the
desired region is a sequential like <8,8,1>. Without the helper the
sequence we get is <0,1,0> -- which the generator currently partially
adjusts when emitting code, but is not sufficient when doing validation
earlier.
The code generated code is slightly modified. From crucible test
func.shader.subtractSaturate.uint in the fragment shader for SIMD8, the
diff looks like
```
mov(8) acc0<1>UD g21<8,8,1>UD { align1 1Q $0.dst };
-add.sat(8) g22<1>UD -acc0<0,1,0>UD g16<8,8,1>UD { align1 1Q @1 $0.dst };
+add.sat(8) g22<1>UD -acc0<8,8,1>UD g16<8,8,1>UD { align1 1Q @1 $0.dst };
```
Note that without the patch generator adjusted the hstride for acc0 used
as destination (see brw_set_dest), but kept the src region as is. For
the source, it is not clear to me why the <0,1,0> would work correctly
here since it is a scalar, but using <8,8,1> it is correct.
Fixes: 58907568ec ("intel/fs: Add SHADER_OPCODE_[IU]SUB_SAT pseudo-ops")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28059>
ARB_shader_image_load_store requires that drivers can compile shaders
containing these tokens, but it doesn't require that they can execute
them. thus, deleting the multisample component is fine since these
shaders will never be executed
affects/fixes:
KHR-GL46.gl_spirv.spirv_validation_capabilities_test
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28078>
This register has changed a little bit for LNL.
While this fixes sparse with TR-TT, it is worth remembering that LNL
is using sparse with vm_bind by default.
v2: Use the proper value instead of hardcoding 0xF (Lionel).
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27316>
