Commit graph

103533 commits

Author SHA1 Message Date
Erik Faye-Lund
591b700944 virgl: respect max_vertex_attrib_stride cap
This is required for OpenGL 4.4 and OpenGL ES 3.1 support.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-07-17 15:45:37 +10:00
Lepton Wu
04e278f793 virgl: Fix flush in virgl_encoder_inline_write.
The current code is buggy: if there are only 12 dwords left in cbuf,
we emit a zero data length command which will be rejected by virglrenderer.
Fix it by calling flush in this case.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-07-17 14:56:25 +10:00
Erik Faye-Lund
b5db3aa6e8 virgl: implement set_min_samples
This allows us to implement glMinSampleShading correctly, which up
until now just got ignored.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-07-17 13:59:47 +10:00
Caio Marcelo de Oliveira Filho
ba1b41b504 glsl: do second pass of const propagation in loops
When handling loops in constant propagation, implement the "FINISHME"
comment like copy propagation: perform a first pass to find values
that can't be propagated, then perform a second pass with the ACP
containing still valid values.

Certain values are killed because the loop may run more than one
iteration, so we can't copy propagate them as they would be invalid in
the later iterations.

Reviewed-by: Eric Anholt <eric@anholt.net>
2018-07-16 16:33:39 -07:00
Caio Marcelo de Oliveira Filho
d7849fd1da glsl: don't let an 'if' then-branch kill const propagation for else-branch
When handling 'if' in constant propagation, if a certain variable was
killed when processing the first branch of the 'if', then the second
would get any propagation from previous nodes. This is similar to the
change done for copy propagation code.

    x = 1;
    if (...) {
        z = x;  // This would turn into z = 1.
        x = 22; // x gets killed.
    } else {
        w = x;  // This would NOT turn into w = 1.
    }

With the change, we let constant propagation happen independently in
the two branches and only then apply the killed values for the
subsequent code.

The new code use a single hash table for keeping the kills of both
branches (the branches only write to it), and it gets deleted after we
use -- instead of waiting for mem_ctx to collect it.

NIR deals well with constant propagation, so it already covered for
the missing ones that this patch fixes.

Reviewed-by: Eric Anholt <eric@anholt.net>
2018-07-16 16:33:39 -07:00
Eric Anholt
229836fb37 v3d: Disable shader-db cycle estimates until we sort out TMU estimates.
I keep having to ignore these shader-db changes since I don't trust them,
so just disable the reports entirely.
2018-07-16 14:39:59 -07:00
Eric Anholt
2baab6bf2a v3d: Emit the lowered uniform just before its first use in a block.
total instructions in shared programs: 98578 -> 98119 (-0.47%)
instructions in affected programs:     27571 -> 27112 (-1.66%)

and it also eliminates most spills/fills on the CTS's randomized uniform
usage testcases.
2018-07-16 14:39:59 -07:00
Eric Anholt
26f830d9fc v3d: Add an assert that we don't provide an invalid texture return words.
The docs had an update noting this restriction, so reflect it in the code.
2018-07-16 14:39:59 -07:00
Eric Anholt
d661d78464 v3d: Apply GFXH-1625 restriction on TMUWT in the end of the shader.
This doesn't affect us yet since we're not doing TMUWTs, but I think we
will for GLES 3.1.
2018-07-16 14:39:59 -07:00
Sergii Romantsov
cec540fbc6 intel/batch_decoder: decoding of 3DSTATE_CONSTANT_BODY.
SNB doesn't have a definition of 3DSTATE_CONSTANT_BODY, thats
why we got segmentation fault when used INTEL_DEBUG=bat.
Fixed by adding of 3DSTATE_CONSTANT_BODY into 3DSTATE_CONSTANT
of VS, GS and PS structures.

v2: added definition of 3DSTATE_CONSTANT_BODY to the gen6.xml

Fixes: 169d8e011a (intel: Fix 3DSTATE_CONSTANT buffer decoding.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107190
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-16 12:18:36 -07:00
Marek Olšák
4054133dcc r600: fix build after the removal of RADEON_PRIO_* flags 2018-07-16 14:33:31 -04:00
Roland Scheidegger
b3474645d4 nir: fix msvc build
Empty initializer braces aren't valid c (it's a gnu extension, and
it's valid in c++).
Hopefully fixes appveyor / msvc build...

Fixes a3150c1d06
2018-07-16 20:07:53 +02:00
Jason Ekstrand
f378fa94b2 nir/worklist: Rework the foreach macro
This makes the arguments match the (thing, container) pattern used in
other nir_foreach macros and also renames it to make that a bit more
clear.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-07-16 11:02:10 -07:00
Eric Anholt
360714bfa5 intel: tools: Fix uninitialized variable warnings in intel_dump_gpu.
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2018-07-16 10:58:40 -07:00
Jason Ekstrand
5e030deaf2 spirv: Fix a couple of image atomic load/store bugs
For one thing, the NIR opcodes for image load/store always take and
return a vec4 value regardless of the image type.  We need to fix up
both the source and destination to handle it.  For another thing, we
weren't actually setting up a destination in the OpAtomicLoad case.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: mesa-stable@lists.freedesktop.org
2018-07-16 10:54:50 -07:00
Marek Olšák
f8aa116c3c winsys/amdgpu: clean up error handling in amdgpu_cs_submit_ib
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Marek Olšák
6b1e0e51e6 radeonsi: rework RADEON_PRIO flags to be <= 31
This decreases sizeof(struct amdgpu_cs_buffer) from 24 to 16 bytes.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Marek Olšák
54ad9b444c radeonsi: merge DCC/CMASK/HTILE priority flags
For a later simplification.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Marek Olšák
3e6888e5d7 radeonsi: remove non-GFX BO priority flags
For a later simplification.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Marek Olšák
342fff6cbc winsys/amdgpu: use alloca when using global_bo_list
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Marek Olšák
6ec44b7055 winsys/amdgpu: remove label bo_list_error
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Marek Olšák
7346e5296e winsys/amdgpu: always update gfx_bo_list_counter
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Marek Olšák
caf41fb96d winsys/amdgpu: make amdgpu_cs_context::flags & handles local
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-16 13:32:33 -04:00
Gert Wollny
78887e99e3 mesa/virgl: Fix off-by-one and copy-paste error in multisample position evaluation
Converting from a switch statement that would not allow intermediate sample counts
to use an if-else chain went a bit wrong, so that in some cases the range that
should be inclusive was exclusive and the line for 16 samples was copies wrongly.

v2: elaborate commit message.

Fixes: 91f48cdfe5
       virgl: Add support for glGetMultisample
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> (v1)
2018-07-16 12:51:39 +02:00
Karol Herbst
4d0d911875 nouveau: fix 3D blitter for unsigned to signed integer conversions
fixes a couple of packed_pixel CTS tests. No regressions inside a CTS run.

v2: simplify the changes a bit

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-07-15 19:28:37 +02:00
Karol Herbst
87c8af2836 nir: fix printing of vec16 type
Fixes: 2f181c8c18
       "glsl_types: vec8/vec16 support"

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-07-15 19:28:37 +02:00
Rob Clark
427a3dbdb1 nir/spirv: implement BuiltInWorkDim
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-07-15 07:51:13 +02:00
Karol Herbst
39180d3931 nir/spirv: print id for unsupported builtins
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-07-15 07:51:13 +02:00
Jason Ekstrand
daa78f30b6 intel/blorp: Handle 3-component formats in clears
This fixes a nasty hang in Batman: Arkham City which apparently calls
vkCmdClearColorImage on a linear RGB image.

cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2018-07-13 20:57:46 -07:00
Jason Ekstrand
11712b9ca1 intel/blorp: Fix blits to R8G8B8_UNORM_SRGB
In this case, the surface faking will give us a R8_UNORM surface and we
need to do an sRGB conversion in the shader.  Found by inspection.

cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2018-07-13 20:57:46 -07:00
Caio Marcelo de Oliveira Filho
4ec8b39fcd util/hash_table: add helper to remove entry by key
And the corresponding test case.

Reviewed-by: Eric Anholt <eric@anholt.net>
2018-07-13 14:20:49 -07:00
Jason Ekstrand
a3150c1d06 nir/lower_tex: Use nir_format_srgb_to_linear
A while ago, we added a bunch of format conversion helpers; we should
use them instead of hand-rolling sRGB conversions.

Reviewed-by: Eric Anholt <eric@anholt.net>
2018-07-13 14:02:18 -07:00
Jason Ekstrand
b52d79514c vc4: Tell NIR to lower fdiv instructions
This should allow us to use them in nir_lower_tex

Reviewed-by: Eric Anholt <eric@anholt.net>
2018-07-13 14:02:18 -07:00
Dylan Baker
53aca66874 docs: Update news, calendar, and relnotes for 18.1.4 2018-07-13 13:54:46 -07:00
Dylan Baker
97870f2cd0 docs: Add sha256 sums for 18.1.4 tarballs 2018-07-13 13:53:03 -07:00
Dylan Baker
e8df2f12d6 docs: Add release notes for 18.1.4 2018-07-13 13:53:01 -07:00
Eric Anholt
d009463a65 vc4: Switch to using u_transfer_helper for MSAA maps.
No requirement, just reduces code duplication.
2018-07-13 13:29:29 -07:00
Eric Anholt
afcc714c98 v3d: Work around GFXH-1461 bug losing our Z/S clears.
If you load S and clear Z or vice versa, the clear may get lost.  Just
fall back to drawing a quad.

Fixes KHR-GLES3.packed_depth_stencil.verify_read_pixels.depth24_stencil8
2018-07-13 13:29:29 -07:00
Eric Anholt
162fcdad6a meson: Move xvmc test tools from unit tests to installed tools.
These are not unit tests, as they rely on the host's XVMC and some user
configuration.  Switch them over to being general installed tools, to fix
unit testing.

Fixes: 22a817af8a ("meson: build gallium xvmc state tracker")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-07-13 13:29:29 -07:00
Gert Wollny
695a4cb0f6 r600: Add spill output to group only if register or target index changes
The current spill code checks in each instruction of an instruction group whether
spilling is needed and if so, it adds spilling for each component as a seperate
instruction and it allocates a new temporary for each component and since it takes
the write mask from the TGSI representation, all components might be written
each time and as a result already written components might be overwritten with
garbage like:

   ...
   y: MOV                R9.y,  [0x42140000 37].x
   t: MOV                R8.x,  [0x42040000 33].y
   ...
   MEM_SCRATCH  WRITE_IND_ACK 0     R9.xy__, @R4.x  ES:3
   MEM_SCRATCH  WRITE_IND_ACK 0     R8.xy__, @R4.x  ES:3
   ...

To resolve this isse accumulate spills to the same memory location so that only one
memory write instruction is emitted for an instruction group that writes up to all
four components.

This fixes updated piglits (see https://patchwork.freedesktop.org/series/46064/):
   spec/glsl-1.30/execution
       fs-large-local-array-vec2.shader_test
       fs-large-local-array-vec3.shader_test
       fs-large-local-array-vec4.shader_test

v2: fix some typos and add comment about piglits (Roland Scheidegger)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
2018-07-13 21:11:34 +02:00
Nanley Chery
3b4279f772 i965/miptree: Allocate MS texture BOs as BUSY
These buffer objects are never accessed with the CPU.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:36:26 -07:00
Nanley Chery
7784a9ceac i965/miptree: Inline make_separate_stencil
Note that the separate stencil miptree now has the same alloc_flag as
the depth component. Only stencil renderbuffers (as opposed to textures)
have BO_ALLOC_BUSY.

v2: Add note about BO_ALLOC_BUSY in message (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:36:26 -07:00
Nanley Chery
74cf188985 i965/miptree: Init r8stencil_needs_update to false
The current behavior masked two bugs where the flag was not set to true
after modifying the stencil texture. One case was a regression
introduced with commit bdbb527a65 and
another was a bug in the depthstencil mapping code. These have since
been fixed.

To prevent such bugs from being masked in the future, initialize
r8stencil_needs_update to false.

v2: Keep the delayed allocation.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:36:19 -07:00
Nanley Chery
ffac81fa5c i965/miptree: Refactor miptree_create
Enable a future patch to create the r8stencil_mt in this function.

v2: Explicitly set etc_format to MESA_FORMAT_NONE (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:31:21 -07:00
Nanley Chery
03cbaae03e i965/miptree: Add and use mt_surf_usage
v2: Make mt_fmt const (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:31:21 -07:00
Nanley Chery
32b22592a8 i965/miptree: Share alloc_flags in miptree_create
Note that this maintains BO_ALLOC_BUSY for depth renderbuffers, but not
depth textures.

v2: Add note about BO_ALLOC_BUSY in message (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:31:21 -07:00
Nanley Chery
2321e85759 i965/miptree: Share the miptree format in miptree_create
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:31:21 -07:00
Nanley Chery
fbe01625f6 i965/miptree: Share tiling_flags in miptree_create
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:31:21 -07:00
Nanley Chery
6c9947c3ef i965/miptree: Delete MIPTREE_CREATE_LINEAR
This enum constant was introduced to enable blit maps with
intel_miptree_create da2880bea0. Now that
such maps use the more direct make_surface function which allows you to
specify the tiling directly, the constant is no longer being used.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:31:21 -07:00
Nanley Chery
684fa59eb6 i965/miptree: Use make_surface in map_blit
Do this so that we don't have to special case linearly-tiled depth
buffers in miptree_create.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-07-13 08:31:21 -07:00