Commit graph

63501 commits

Author SHA1 Message Date
Marek Olšák
57f3da997a radeonsi: implement ARB_texture_query_lod
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-06-19 00:18:17 +02:00
Marek Olšák
6a2b38381e radeonsi: pass ARB_conservative_depth parameters to the hardware
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-06-19 00:17:36 +02:00
Marek Olšák
1df7199fc9 gallium: implement ARB_texture_query_levels
The extension is always supported if GLSL 1.30 is supported.

Softpipe and llvmpipe support is also added (trivial).
Radeon and nouveau support is already done.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-06-19 00:17:36 +02:00
Marek Olšák
552c70a837 st/mesa: set sampler_view::last_level correctly
It was set to pipe_resource::last_level and _MaxLevel was embedded in max_lod,
that's why it worked for ordinary texturing. However, min_lod doesn't have
any effect on texelFetch and textureQueryLevels, so we must still set
last_level correctly.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-06-19 00:17:09 +02:00
Dave Airlie
c530282bbc st/mesa: handle array textures in st_texture_image_copy
Marek: also handle cube arrays

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-06-19 00:17:09 +02:00
Marek Olšák
6818e117ce radeonsi: cosmetic changes in si_shader.c
reviewed by Michel Dänzer
2014-06-19 00:17:09 +02:00
Marek Olšák
c7b5a5c4a3 radeonsi: implement ARB_texture_gather and Gather functions from GLSL 4.00
All ARB_texture_gather and gather-related ARB_gpu_shader5 piglit tests pass.

reviewed by Michel Dänzer
2014-06-19 00:17:09 +02:00
Marek Olšák
0df3551bf4 st/mesa: fix geometry shader max texture limit in state validation
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-06-19 00:14:00 +02:00
Marek Olšák
bb867e2f2f r600g: fix the max vertex shader input limit 2014-06-19 00:14:00 +02:00
Ian Romanick
cc219d1d65 meta: Respect the driver's maximum number of draw buffers
Commit c1c1cf5f9 added infrastructure for saving and restoring draw
buffer state.  However, it universially used MAX_DRAW_BUFFERS, but many
drivers support far fewer than that at limit.  For example, the radeon
and i915 drivers only support 1.  Using MAX_DRAW_BUFFERS causes meta to
generate GL errors.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80115
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Kenneth Graunke <kenneth@whitecape.org> [on Broadwell]
Tested-by: jpsinthemix@verizon.net
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
2014-06-18 14:45:25 -07:00
Roland Scheidegger
56335b4441 gallivm: fix SCALED -> NORM conversions
Such conversions (which are most likely rather pointless in practice) were
resulting in shifts with negative shift counts and shifts with counts the same
as the bit width. This was always undefined in llvm, the code generated was
rather horrendous but happened to work.
So make sure such shifts are filtered out and replaced with something that
works (the generated code is still just as horrendous as before).

This fixes lp_test_format, https://bugs.freedesktop.org/show_bug.cgi?id=73846.

v2: prettify by using build context shift helpers.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-06-18 19:52:57 +02:00
Kristian Høgsberg
7928b946ad mesa: Remove glClear optimization based on drawable size
A drawable size of 0x0 means that we don't have buffers for a drawable yet,
not that we have a zero-sized buffer.  Core mesa shouldn't be optimizing out
drawing based on buffer size, since the draw call could be what triggers
the driver to go and get buffers.  As discussed in the referenced bug report,
the optimization was added as part of a scatter-shot attempt to fix a
different problem.  There's no other example in mesa core of using the
buffer size in this way.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74005
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-18 10:15:03 -07:00
Juha-Pekka Heikkila
fe5224b16a mesa: In emit_texenv() type mismatch was forced with typecast
Type mismatch caused random memory to be copied when casted
memory area was smaller than expected type.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-18 16:15:51 +03:00
Grigori Goronzy
6cd30f5d73 radeon/uvd: disable VC-1 simple/main on UVD 2.x
It's about as broken as on later UVD revisions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66452
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-18 13:58:52 +02:00
Grigori Goronzy
cf05f9bf01 radeonsi: add sampling of 4:2:2 subsampled textures
This makes 4:2:2 video surfaces work in VDPAU.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-06-18 13:58:37 +02:00
Grigori Goronzy
f5dafc156a util/u_format: move utility function from r600g
We need this for radeonsi, and it might be useful for other drivers,
too.
2014-06-18 13:58:19 +02:00
Leo Liu
700100d94b radeon/vce: set number of cpbs based on level
v2: add error check for cpb size 0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-18 13:53:27 +02:00
Leo Liu
0796483282 radeon/vce: implement h264 level support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-18 13:53:23 +02:00
Leo Liu
e2db7c10d6 st/omx/enc: implement h264 level support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-18 13:53:20 +02:00
Leo Liu
4fca06a902 vl: add level interface
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-18 13:53:17 +02:00
Leo Liu
cb9fcc5c44 st/st/omx: fix switch-case indentation in vid_enc.c
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-18 13:52:54 +02:00
Jon TURNEY
83821ece79 glx: Add an error message when a direct renderer's createScreen() routine fails
because no matching fbConfigs or visuals could be found.

Nearly all the error cases in *createScreen() issue an error message to diagnose
the failure to initialize before branching to handle_error.  The few remaining
error cases which don't should probably do the same.

(At the moment, it seems this can be triggered in drisw with an X server which
reports definite values for MAX_PBUFFFER_(WIDTH|HEIGHT|SIZE), because those
attributes are checked for an exact match against 0.)

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-18 09:55:45 +01:00
Chia-I Wu
88b887faa9 i965/vec4: unit test for copy propagation and writemask
This unit test demonstrates a subtle bug fixed by
4ddf51db6a.

Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-06-18 13:43:05 +08:00
Matt Turner
6c2d815d64 i965/vec4/gs: Silence warning about unused 'success' in release build.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:41 -07:00
Matt Turner
17f2dd7274 i965/disasm: Mark three_source_reg_encoding[] static.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:39 -07:00
Matt Turner
9f7b5fa2c8 i965/blorp: Remove unused 'brw' member.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:38 -07:00
Matt Turner
73ab06f9c5 i965/blorp: Mark branch unreachable to silence uninitialized var warning.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:36 -07:00
Matt Turner
f3aecefa99 i965: Silence warning about unused brw in release builds.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:34 -07:00
Matt Turner
836f4299e8 i965: Mark backend_instruction and bblock_t as structs.
They have to be marked as structs for C code elsewhere. bblock_t is
already defined as a struct, and all of backend_instruction's fields are
public anyway.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:33 -07:00
Matt Turner
83649587c6 i965: Use standard SSE intrinsics instead of gcc built-ins.
Let's this file compile with clang.

Reviewed-by: Frank Henigman <fjhenigman@google.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:20 -07:00
Matt Turner
52a4065493 mesa: Remove unused functions from perfomance query code.
Perhaps useful for debugging? Never used otherwise. Added by commit
8cf5bdad.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:18 -07:00
Matt Turner
7f3f9b1a68 mesa: Remove unused extra_EXT_texture_integer.
Unused since commit b6475f94.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:17 -07:00
Matt Turner
9f4e776433 mesa: Mark default case unreachable to silence warning.
Warned about 'coord' being undefined in the default case, which is
unreachable.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:14 -07:00
Matt Turner
6ac5adce63 egl: Remove unused variable dri_driver_path.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:12 -07:00
Matt Turner
d2458a4710 swrast: Remove unused solve_plane_recip().
Unused since commit 9e8a961d.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:11 -07:00
Matt Turner
db650d9ec1 glsl: Remove 'struct' from ir_variable declaration.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-17 10:18:06 -07:00
Matt Turner
ebc7524503 Revert "i965: Add 'wait' instruction support"
This reverts commit 20be3ff576.

No evidence of ever being used.
2014-06-17 10:16:23 -07:00
Matt Turner
fab92fa1cb i965/fs: Optimize SEL with the same sources into a MOV.
instructions in affected programs:     474 -> 462 (-2.53%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-17 09:40:31 -07:00
Matt Turner
35bc02dee8 i965/fs: Perform CSE on texture operations.
Helps Unigine Tropics and some (old) gstreamer shaders in shader-db.

instructions in affected programs:     792 -> 744 (-6.06%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-17 09:40:31 -07:00
Matt Turner
18372a7100 i965/fs: Copy propagate from load_payload.
But only into non-load_payload instructions. Otherwise we would prevent
register coalescing from combining identical payloads.
2014-06-17 09:40:30 -07:00
Matt Turner
31ae9c25ff i965/fs: Perform CSE on load_payload instructions if it's not a copy.
Since CSE creates instructions, if we let CSE generate things register
coalescing can't remove, bad things will happen. Only let CSE combine
non-copy load_payloads.

E.g., allow CSE to handle this

   load_payload vgrf4+0, vgrf5, vgrf6

but not this

   load_payload vgrf4+0, vgrf5+0, vgrf5+1
2014-06-17 09:40:30 -07:00
Matt Turner
8f4e324be2 i965/fs: Support register coalescing on LOAD_PAYLOAD operands. 2014-06-17 09:40:07 -07:00
Matt Turner
4b7bca8979 i965/fs: Emit load_payload instead of multiple MOVs for large VGRFs. 2014-06-17 09:40:07 -07:00
Matt Turner
68b7b03429 i965/fs: Only consider real sources when comparing instructions. 2014-06-17 09:38:06 -07:00
Matt Turner
856860db4a i965/fs: Apply cube map array fixup and restore the payload.
So that we don't have partial writes to a large VGRF. Will be cleaned up
by register coalescing.
2014-06-17 09:38:06 -07:00
Matt Turner
15b6ab04e2 i965/fs: Use LOAD_PAYLOAD in emit_texture_gen7(). 2014-06-17 09:38:06 -07:00
Matt Turner
138905d728 i965/fs: Lower LOAD_PAYLOAD and clean up.
Clean up with with register_coalesce()/dead_code_eliminate().
2014-06-17 09:38:05 -07:00
Matt Turner
b996216384 i965/fs: Add SHADER_OPCODE_LOAD_PAYLOAD.
Will be used to simplify the handling of large virtual GRFs in SSA form.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-06-17 09:38:05 -07:00
Tapani Pälli
39cdf1621e glsl: type check between switch init-expression and case
Patch adds a type check between switch init-expression and case label
and performs a implicit signed->unsigned type conversion when possible.

v2: add GLSL spec reference, do implicit conversion if possible (Matt)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79724
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-06-17 08:13:28 +03:00
Tobias Klausmann
5357c14da4 nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX
Use TGSI_SEMANTIC_VIEWPORT_INDEX for the last consumer.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-06-16 23:08:32 -04:00