Commit graph

8519 commits

Author SHA1 Message Date
Lionel Landwerlin
54bc34f70a anv: comment out the Gfx8/9 VB cache key workaround for newer Gens
This code shows up a little on profiling on Gfx12 and since it's only
a gfx8/9 workaround we might as well ifdef it out.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
2022-10-14 23:03:16 +00:00
Lionel Landwerlin
f8136ea5b6 anv: remove unused code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
2022-10-14 23:03:16 +00:00
David Heidelberg
9cb251a0b0 ci/traces: Blender demo (Cube Diorama) flakes on Intel APL
Acked-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19067>
2022-10-14 18:44:30 +00:00
Väinö Mäkelä
cfc6bdb760 hasvk: Correctly set NonPerspectiveBarycentricEnable on gfx7
The incorrect #else has existed since commit bfd9942cdc, but the issue
was already present before that. NonPerspectiveBarycentricEnable must be
enabled if non-perspective interpolation is used.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7449
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19004>
2022-10-14 08:18:40 +00:00
Yonggang Luo
44ccaca41d util/mesa/wide: Rename _SIMPLE_MTX_INITIALIZER_NP to SIMPLE_MTX_INITIALIZER
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18393>
2022-10-14 03:27:41 +00:00
Kenneth Graunke
2dfab687ec intel/compiler: Vectorize gl_TessLevelInner/Outer[] writes [v2]
Setting the NIR options takes care of iris thanks to the common st/mesa
linking code, and updating brw_nir_link_shaders should handle anv.

The main effort here is updating remap_tess_levels, which needs to
handle vector stores, writemasking, and swizzling.  Unfortunately,
we also need to continue handling the existing single-component
access because it's used for TES inputs, which we don't vectorize.

We could try to vectorize TES inputs too, but they're all pushed
anyway, so it wouldn't buy us much other than deleting this code.
Also, we do have opt_combine_stores, but not one for loads.

One limitation of using nir_vectorize_tess_levels is that it works
on variables, and so isn't able to combine outer/inner writes that
happen to live in the same vec4 slot (for triangle domains).  That
said, it's still better than before.

For writes, we allow the intrinsics to supply up to the full size
of the variable (vec4 for outer, vec2 for inner) even if the domain
only requires a subset of those components (i.e. triangles needs 3).

shader-db results on Icelake:

   total instructions in shared programs: 19600314 -> 19597528 (-0.01%)
   instructions in affected programs: 65338 -> 62552 (-4.26%)
   helped: 271 / HURT: 0
   helped stats (abs) min: 6 max: 24 x̄: 10.28 x̃: 12
   helped stats (rel) min: 1.30% max: 18.18% x̄: 5.80% x̃: 7.59%
   95% mean confidence interval for instructions value: -10.71 -9.85
   95% mean confidence interval for instructions %-change: -6.17% -5.43%
   Instructions are helped.

   total cycles in shared programs: 851842332 -> 851808165 (<.01%)
   cycles in affected programs: 618577 -> 584410 (-5.52%)
   helped: 271 / HURT: 0
   helped stats (abs) min: 64 max: 540 x̄: 126.08 x̃: 111
   helped stats (rel) min: 2.57% max: 37.97% x̄: 6.12% x̃: 5.06%
   95% mean confidence interval for cycles value: -135.35 -116.80
   95% mean confidence interval for cycles %-change: -6.67% -5.57%
   Cycles are helped.

   total sends in shared programs: 1025238 -> 1024308 (-0.09%)
   sends in affected programs: 6454 -> 5524 (-14.41%)
   helped: 271 / HURT: 0
   helped stats (abs) min: 2 max: 8 x̄: 3.43 x̃: 4
   helped stats (rel) min: 5.71% max: 25.00% x̄: 14.98% x̃: 17.39%
   95% mean confidence interval for sends value: -3.57 -3.29
   95% mean confidence interval for sends %-change: -15.42% -14.54%
   Sends are helped.

According to Felix DeGrood, this results in a 10% improvement in
the draw call time for certain draw calls from Strange Brigade.

v2: Fix assertions about number of components and add more of them.
    Combine the quads and triangles handling as it's nearly identical.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19061>
2022-10-13 11:38:21 -07:00
semjon00
44d917bdf3 hasvk: force inline more pipe flush functions
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18965>
2022-10-13 14:21:38 +00:00
semjon00
760b43f32c hasvk: combine flushes in Draw/DrawIndexed/DrawIndirectByteCountEXT
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18965>
2022-10-13 14:21:38 +00:00
semjon00
bee1f7b83a hasvk: don't export gfx state flushing helper
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18965>
2022-10-13 14:21:38 +00:00
semjon00
6db3a82fb2 hasvk: don't export flush_compute_state
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18965>
2022-10-13 14:21:38 +00:00
Dylan Baker
3395b40b37 intel/genxml: use Path.replace instead of unlink and rename
Suggested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:59:15 -07:00
Dylan Baker
ede03c99db intel/genxml: use a main() function
So we have less stuff in the global namespace

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:59:12 -07:00
Dylan Baker
0ac3b6f671 intel/genxml: split the processing code up
Instead of crewating output or validating in the process code, just
process, then let main handle the rest

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:59:09 -07:00
Dylan Baker
8c8a1966ab intel/genxml: reprocess xml with elementree output
This makes two relatively small changes, first it addes the encoding to
the xml delcaration, and switches the quote style. Second, it changes
the final newline. These seemed minor enough to not warrent patches to
make the old wrter do the same thing as the new writer.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:59:06 -07:00
Dylan Baker
9a185d78ca intel/genxml: use ElementTree.write and .indent
This removes a bunch of hand-written code, and allows for fewer corner
cases. The resulting code has some minor differences (no empty newlines
and the encoding is declared in the xml declaration)

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:59:03 -07:00
Dylan Baker
b876f4daa9 intel/genxml: re-process with extra whitespace removed
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:59:01 -07:00
Dylan Baker
db8c6590e0 intel/genxml: remove newlines between xml islands
When we move to using etree to print this it won't have them, so this
minimizes the diff further.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:58:58 -07:00
Dylan Baker
9acd459bee intel/genxml: re-process with space before />
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:58:56 -07:00
Dylan Baker
b150b89e61 intel/genxml: write a space before the '/>` closing tag
ElementTree.write will do this, and we want to minimize the diff when we
switch from our own writer to the builtin one.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18955>
2022-10-12 10:58:49 -07:00
Tapani Pälli
13c422e1b2 anv: toggle on EXT_extended_dynamic_state3
This enabled the extension and toggles on supported features.

v2: set false to non-supported features (Lionel)
    add dynamic sample mask (Tapani)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:05 +00:00
Tapani Pälli
9f6af43743 anv: dynamic multisample sample mask
This affects following packets:

  3DSTATE_SAMPLE_MASK

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:05 +00:00
Tapani Pälli
8e0377dcf3 anv: dynamic color blend equation
This affects following packets:

  BLEND_STATE_ENTRY
  3DSTATE_PS_BLEND

v2: move vk_to_intel_blend and vk_to_intel_blend_op,
    remove ps_blend merge (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:05 +00:00
Tapani Pälli
fc3fd7c69e anv: dynamic color write mask
This affects following packets:

  3DSTATE_BLEND_STATE_POINTERS

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:05 +00:00
Tapani Pälli
0b75376e4d anv: dynamic provoking vertex mode
This affects following packets:

  3DSTATE_CLIP
  3DSTATE_SF
  3DSTATE_STREAMOUT

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:05 +00:00
Tapani Pälli
1a8209218e anv: dynamic states for depth clip and clamp
This change implements 3 states in one go:

  - depth clamp enable
  - depth clip enable
  - depth clip negative one to one

This affects following packets:

  3DSTATE_CLIP
  3DSTATE_VIEWPORT_STATE_POINTERS_CC
  3DSTATE_RASTER

v2: remove clip enable bit check from viewport emit (Lionel)
v3: use helper function from runtime to get depth clip (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Tapani Pälli
ba645f1623 anv: dynamic alpha to one enable
This affects following packets:

  BLEND_STATE

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Tapani Pälli
9dc6bed9a1 anv: dynamic state for logic op enable
This affects following packets:

  3DSTATE_PS_BLEND
  3DSTATE_BLEND_STATE_POINTERS

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Tapani Pälli
ad2e80ee53 anv: dynamic line rasterization mode
This affects following packets:

  3DSTATE_RASTER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Tapani Pälli
fe5a259723 anv: dynamic line stipple enable
This affects following packets:

  3DSTATE_WM

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Tapani Pälli
0a6d0fed9d anv: dynamic rasterization stream
This affects following packets:

  3DSTATE_STREAMOUT

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Tapani Pälli
0f33d7061b anv: dynamic state for tessellation domain origin
This affects following packets:

  3DSTATE_TE

v2: remove render target check, move cmd_emit_te and
    stop merging it, cleanups (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Tapani Pälli
cc0ada2d67 anv: dynamic state for polygon mode
Remove 'polygon_mode' from pipeline and read it from
dynamic state instead.

This affects following packets:

  3DSTATE_CLIP
  3DSTATE_RASTER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
2022-10-11 16:29:04 +00:00
Rohan Garg
c0c243f1cb anv, iris: Disable pre fetching the binding table entries on DG2
On DG2 the HW will fetch the binding entries into the cache
for every single thread when a compute walker is dispatched,
wiping out the advantages of the cache prefetch.

The spec also advises to not do a cache prefetch when we have more than
31 binding table entries, but most real world applications will never
hit that limit.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18498>
2022-10-11 15:16:09 +02:00
Tapani Pälli
b62d1c257e anv: mark debug variables with ASSERTED
To clean up compilation warnings about unused variables
when asserts are disabled.

v2: UNUSED -> ASSERTED (Eric Engestrom)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19016>
2022-10-11 04:14:30 +00:00
Tapani Pälli
c9c9a5b78d intel/fs: mark debug variables with ASSERTED
To clean up compilation warnings about unused variables
when asserts are disabled.

v2: UNUSED -> ASSERTED (Eric Engestrom)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19016>
2022-10-11 04:14:30 +00:00
Lionel Landwerlin
1e29a1a8c5 anv: add grl build dependency on entrypoints
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7446
Fixes: f3ddfd81b4 ("anv: Build BVHs on the GPU with GRL")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19007>
2022-10-10 19:14:07 +00:00
Lionel Landwerlin
1964899c28 intel: add INTEL_DEBUG=capture-all to capture everything upon hang
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewd-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18977>
2022-10-07 07:45:22 +00:00
Jason Ekstrand
650880105e vulkan,lavapipe: Use a tri-state enum for depth clip enable
This should make it a lot more clear how depth clip enables work.
Annoyingly, because of the way they originally worked in Vulkan 1.0,
it's dependent on the depth clamp if the state isn't set in the pipeline
and isn't declared dynamic.  The enum is explicitly set up so that
drivers don't need to be aware of this change unless they already
implement VK_EXT_extended_dynamic_state3.  If depth clamp/clamp are not
dynamic, depth clip will be either TRUE or FALSE which map to 1/0 so the
field can still be treated as a boolean.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18889>
2022-10-07 06:22:32 +00:00
Iván Briano
406a1854d0 vulkan_hasvk: set READ/WRITE_WITHOUT_FORMAT for buffer views
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18958>
2022-10-05 09:45:57 -07:00
Iván Briano
b75fbfdd46 anv: set READ/WRITE_WITHOUT_FORMAT for buffer views
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18958>
2022-10-05 09:45:50 -07:00
José Roberto de Souza
0066e60fc4 anv: Split the debug part of anv_queue_exec_locked()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
2022-10-04 18:35:50 +00:00
José Roberto de Souza
bc384e24f0 anv: Use Vulkan types for priority as much as possible
Continuing the work to split i915_drm.h specific code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
2022-10-04 18:35:50 +00:00
José Roberto de Souza
f5a58b8886 anv: Split i915 specific parts of anv_queue_submit_simple_batch()
This will make easier to spot more places where the code can
simplified after the hasvk split.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
2022-10-04 18:35:50 +00:00
José Roberto de Souza
35ed40f356 anv: Move fetch of i915 physical device parameters
Move everything that depends on i915_drm.h to its own function,
in a future MR will move the parameters that are also needed by
Iris to intel_device_info.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
2022-10-04 18:35:50 +00:00
José Roberto de Souza
a17783b066 intel/dev: Split i915 specific parts of intel_get_device_info_from_fd()
Continuing the work to split i915_drm.h specific code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
2022-10-04 18:35:50 +00:00
José Roberto de Souza
03b959286e intel: Make engine related functions and types not i915 dependent
There is too much i915_drm.h code spread, this patch start to fix that
by re-organizing engine related code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
2022-10-04 18:35:50 +00:00
Tapani Pälli
1cf1a94f97 intel: revert preemption disable via VFG changes
This register will not be whitelisted and this change will be
done in kernel instead.

This change reverts commits d5d4604a, ddcd6b38, 27c5b93d.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18897>
2022-10-04 10:38:49 +00:00
Emma Anholt
0ae3eb834d ci/iris: Update iris traces checksums.
The previous commits in this MR caused a minor rendering change for
Unvanquished.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18466>
2022-10-03 17:18:31 +00:00
José Roberto de Souza
1e87834980 intel: Share code to read render timestamp
Timestamp read is not in any hot path so there is no down-sides in
share the same function between iris, crocus, anv and hasvk.

Also while at it also dropping the functions to read MMIO from kernel,
the only use is read render timestamp so we don't need it.

v2:
- fix compilaton of ds

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18920>
2022-10-03 06:26:50 -07:00
Dylan Baker
1f0a0a46d9 meson: run genxml sort tests
Reviewd-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18917>
2022-10-01 14:03:49 -07:00