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anv: comment out the Gfx8/9 VB cache key workaround for newer Gens
This code shows up a little on profiling on Gfx12 and since it's only a gfx8/9 workaround we might as well ifdef it out. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Emma Anholt <emma@anholt.net> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
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3 changed files with 12 additions and 3 deletions
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@ -208,6 +208,7 @@ blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch,
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uint32_t *sizes,
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unsigned num_vbs)
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{
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#if GFX_VER == 9
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struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
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for (unsigned i = 0; i < num_vbs; i++) {
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@ -227,6 +228,7 @@ blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch,
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*/
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genX(cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush)(cmd_buffer, SEQUENTIAL,
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(1 << num_vbs) - 1);
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#endif
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}
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UNUSED static struct blorp_address
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@ -3690,8 +3690,10 @@ emit_vertex_bo(struct anv_cmd_buffer *cmd_buffer,
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.BufferSize = size
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});
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#if GFX_VER == 9
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genX(cmd_buffer_set_binding_for_gfx8_vb_flush)(cmd_buffer,
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index, addr, size);
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#endif
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}
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static void
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@ -3743,6 +3745,7 @@ static void
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update_dirty_vbs_for_gfx8_vb_flush(struct anv_cmd_buffer *cmd_buffer,
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uint32_t access_type)
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{
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#if GFX_VER == 9
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struct anv_graphics_pipeline *pipeline = cmd_buffer->state.gfx.pipeline;
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const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);
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@ -3756,6 +3759,7 @@ update_dirty_vbs_for_gfx8_vb_flush(struct anv_cmd_buffer *cmd_buffer,
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genX(cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush)(cmd_buffer,
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access_type == RANDOM,
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vb_used);
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#endif
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}
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ALWAYS_INLINE static void
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@ -5907,6 +5911,7 @@ genX(cmd_buffer_emit_gfx12_depth_wa)(struct anv_cmd_buffer *cmd_buffer,
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#endif
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}
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#if GFX_VER == 9
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/* From the Skylake PRM, 3DSTATE_VERTEX_BUFFERS:
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*
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* "The VF cache needs to be invalidated before binding and then using
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@ -5970,9 +5975,6 @@ genX(cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush)(struct anv_cmd_buffer *cmd_b
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uint32_t access_type,
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uint64_t vb_used)
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{
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if (GFX_VER > 9)
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return;
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if (access_type == RANDOM) {
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/* We have an index buffer */
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struct anv_vb_cache_range *bound = &cmd_buffer->state.gfx.ib_bound_range;
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@ -6001,6 +6003,7 @@ genX(cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush)(struct anv_cmd_buffer *cmd_b
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}
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}
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}
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#endif /* GFX_VER == 9 */
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/**
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* Update the pixel hashing modes that determine the balancing of PS threads
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@ -280,7 +280,9 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
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genX(cmd_buffer_config_l3)(cmd_buffer, cfg);
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}
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#if GFX_VER == 9
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genX(cmd_buffer_set_binding_for_gfx8_vb_flush)(cmd_buffer, 32, src, size);
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#endif
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genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
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genX(flush_pipeline_select_3d)(cmd_buffer);
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@ -289,8 +291,10 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
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cmd_buffer->state.current_l3_config);
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emit_so_memcpy(&cmd_buffer->batch, cmd_buffer->device, dst, src, size);
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#if GFX_VER == 9
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genX(cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush)(cmd_buffer, SEQUENTIAL,
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1ull << 32);
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#endif
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/* Invalidate pipeline & raster discard since we touch
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* 3DSTATE_STREAMOUT.
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