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anv: disable preemption on VFG, Wa_14015207028 for DG2

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This workaround disables batch level preemption for Polygon,
Trifan and Lineloop primitive topologies.

v2: cleanups (José)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18456>
This commit is contained in:
Tapani Pälli 2022-05-11 12:59:38 +03:00 • committed by Marge Bot
parent d5d4604aa6
commit ddcd6b3834
1 changed files with 13 additions and 0 deletions
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13
src/intel/vulkan/genX_state.c
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@ -322,6 +322,7 @@ init_render_queue_state(struct anv_queue *queue)
}
}
#if GFX_VERx10 < 125
/* an unknown issue is causing vs push constants to become
* corrupted during object-level preemption. For now, restrict
* to command buffer level preemption to avoid rendering
@ -336,6 +337,18 @@ init_render_queue_state(struct anv_queue *queue)
cc1.DisablePreemptionandHighPriorityPausingdueto3DPRIMITIVECommandMask = true;
#endif
}
#endif
/* Wa_14015207028
*
* Disable batch level preemption for some primitive topologies.
*/
#if GFX_VERx10 == 125
anv_batch_write_reg(&batch, GENX(VFG_PREEMPTION_CHICKEN_BITS), vfgc) {
vfgc.PolygonTrifanLineLoopPreemptionDisable = true;
vfgc.PolygonTrifanLineLoopPreemptionDisableMask = true;
}
#endif
#if GFX_VERx10 == 120
/* Wa_1806527549 says to disable the following HiZ optimization when the