Commit graph

88 commits

Author SHA1 Message Date
Iago Toral Quiroga
4ef31ba460 broadcom/qpu: fix packing/unpacking of fmov variants for v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Iago Toral Quiroga
e9b44ae0c8 broadcom/qpu: add new ADD opcodes for FMOV/MOV in v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Iago Toral Quiroga
28bb1b3ff6 broadcom/compiler: add a v3d71_qpu_writes_waddr_explicitly helper
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Iago Toral Quiroga
572fba0bf4 broadcom/compiler: implement read stall check for v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
68526423fb broadcom/qpu: return false on qpu_writes_accumulatorXX helpers for v71
As for v71 doesn't have accumulators (devinfo->has_accumulators set to
false), those methods would always return false.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
d7b15c2b42 broadcom/qpu: update disasm_raddr for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
3b20208f03 broadcom/qpu: add pack/unpack support for v71
Note that we provide new v71 alu pack/unpack methods. As there are a
lot that it is equivalent, initially we tried to use existing methods
as template and add version checks on the existing methods. At some
early point that become just really unreadable, so it become better to
just provide new methods, even if v42 and v71 methods have a really
similar structure.

Note that we have splitted the op tables, and created a two (add/mul)
for v71. As the description struct include versioning info, we could
have just used one table. But, specially with the add table, there are
a lot of differences with v71. So it is slightly tidier this
way. Also, taking into account that we do a linear search on the
tables, this can be even justified by performance.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
c07eb1bae5 broadcom/qpu: add qpu_writes_rf0_implicitly helper
On v71 rf0 replaces r5 as the register that gets updated implicitly
with uniform loads, and gets the C coefficient with ldvary. This
helper return if rf0 gets implicitly updated.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
ef75d07b87 broadcom/qpu: defining shift/mask for raddr_c/d
On V3D 7.x it replaces mul_a/b and add_a/b

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
a5c4634c9e broadcom/qpu: add raddr on v3d_qpu_input
On V3D 7.x mux are not used, and raddr_a/b/c/d are used instead

This is not perfect, as for v71, the raddr_a/b defined at qpu_instr
became superfluous. But the alternative would be to define two
different structs, or even having them defined based on version
ifdefs, so this is a reasonable compromise.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
347065525f broadcom/qpu: define v3d_qpu_input, use on v3d_qpu_alu_instr
At this point it just tidy up a little the alu_instr structure.

But also serves to prepare the structure for new changes, as 7.x uses
raddr instead of mux, and it is just easier to add the raddr to the
new input structure.

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
2247934914 broadcom/qpu: add v71 signal map
Compared with v41, the differences are:
   * 14, 15, 29 and 30 are now about immediate a, b, c, d respectively
   * 23 is now reserved. On v42 this was for rotate signals, that are
     gone on v71.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
3d0c3667dd broadcom/compiler: add small_imm a/c/d on v3d_qpu_sig
small_imm_a, small_imm_c and small_imm_d added on top of the already
existing small_imm_b, as V3D 7.1 defines 4 small immediates, tied to
the 4 raddr. Note that this is only the definition, and just a inst
validation rule to check that are not used before v71. Any real use is
still pending.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
e5011e19c7 broadcom/compiler: rename small_imm to small_imm_b
Current small_imm is associated with the "B" read address.

We do this change in advance for v71 support, where we will have 4
different small_imm (a/b/c/d), so we start with a renaming.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
f9bcefa964 broadcom/qpu: set V3D 7.x names for some waddr aliasing
V3D 7.x got rid of the accumulator, but still uses the values for
WADDR_R5 and WADDR_R5REP, so let's return a proper name and add some
aliases.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Alejandro Piñeiro
e1c19d55ea broadcom/qpu: add comments on waddr not used on V3D 7.x
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
2023-10-13 22:37:41 +00:00
Eric Engestrom
953ac9da79 v3d/qpu: fix type of function argument
Fixes: 05c7d9715b ("broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
2023-08-20 04:58:17 +00:00
Iago Toral Quiroga
148473eae4 broadcom/compiler: fix incorrect ALU checks
We had a bunch of cases where we would check ALU parameters without
first checking if the ALU op was valid.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22675>
2023-04-25 11:15:26 +02:00
Iago Toral Quiroga
b3ac456eb1 broadcom/compiler: add a v3d_qpu_instr_is_legacy_sfu helper
This checks for the deprecated, old-style SFU instructions triggered by
magic writes.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22593>
2023-04-24 09:34:20 +00:00
Iago Toral Quiroga
4a3be610d5 broadcom/compiler: fix v3d_qpu_uses_sfu
We should check that the alu op is valid before testing the
write address.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22593>
2023-04-24 09:34:20 +00:00
Iago Toral Quiroga
90857262da broadcom/compiler: detect unifa write from signal
It is possible for some signals to write to unifa directly. We will
enable this from ldunif shortly so we should check for it here.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18667>
2022-09-20 06:56:28 +00:00
Eric Engestrom
5bfca00d31 broadcom: fix dependencies in static_library() calls
The first argument is the name of the library, and the second argument
is the list of files; those two got a bit mixed up.

Fixes: 1ae8018a6a ("meson: Add support for the vc4 driver.")
Fixes: 4f3e380fa0 ("meson: Add support for the vc5 driver.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18593>
2022-09-14 09:38:28 +00:00
Thomas H.P. Andersen
430b1157a1 broadcom: drop unused functions
Fixes a clang warning about unused static inlined functions

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14790>
2022-01-31 16:10:31 +00:00
Iago Toral Quiroga
b42f4b8809 broadcom/compiler: padding fixes to QPU assembly dumps
When there are dst/src modifiers it is pretty common that instructions
take too much space and lead to alignment issues that make code a lot
harder to read, so align the MUL and SIG columns a bit wider to avoid
this:

Before:

0x380021828003faa8 fmax  rf2, rf42.abs, rf40.abs; nop
0x3800f186c503f0f0 fcmp.pushc  -, rf3, rf48; nop
0x380c038b85b83282 fmax  rf11, rf10, rf2; mov.ifa  rf14, rf46
0x3800219ab503f359 and  rf26, rf13, rf25; nop
0x3820f186c503f2f0 fcmp.pushc  -, rf11, rf48; nop           ; thrsw
0x382c013fb5b8368e and  rf63, rf26, rf14; mov.ifa  rf4, rf46; thrsw
0x38002185b503ffc4 and  rf5, rf63, rf4  ; nop
0x38002186b503f141 and  rf6, rf5, rf1   ; nop
0x382031873503f186 vfpack  tlb, rf6, rf6; nop               ; thrsw
0x380031873503f18f vfpack  tlb, rf6, rf15; nop
0x38003186bb03f000 nop                  ; nop

After:

0x380021828003faa8 fmax rf2, rf42.abs, rf40.abs  ; nop
0x3800f186c503f0f0 fcmp.pushc -, rf3, rf48       ; nop
0x380c038b85b83282 fmax rf11, rf10, rf2          ; mov.ifa rf14, rf46
0x3800219ab503f359 and rf26, rf13, rf25          ; nop
0x3820f186c503f2f0 fcmp.pushc -, rf11, rf48      ; nop                         ; thrsw
0x382c013fb5b8368e and rf63, rf26, rf14          ; mov.ifa rf4, rf46           ; thrsw
0x38002185b503ffc4 and rf5, rf63, rf4            ; nop
0x38002186b503f141 and rf6, rf5, rf1             ; nop
0x382031873503f186 vfpack tlb, rf6, rf6          ; nop                         ; thrsw
0x380031873503f18f vfpack tlb, rf6, rf15         ; nop
0x38003186bb03f000 nop                           ; nop

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13545>
2021-10-28 08:12:14 +00:00
Iago Toral Quiroga
0a277fabce broadcom/compiler: fix condition encoding bug
When both AC and MC are set, AC is encoded in bits 0..1 not 0..3.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13527>
2021-10-27 06:03:12 +00:00
Iago Toral Quiroga
3fbd6662b7 broadcom/compiler: rework simultaneous peripheral access checks
This was not quite correct in that our checks for the allowed cases
were not checking that there were no other peripheral access other
than the ones allowed.

For example, we allowed  wrtmuc signal and TMU write other than
TMUC, and we also allowed TMU read and VPM read/write. But we
cannot allow wrtmuc with TMU write other than TMUC and at the
same time a VPM write for example, so we can't just check if we
have a combination of allowed peripherals, we still need to check
that those are the only ones in use by the combined instructions.

Another example is that even if we allow a TMU write (other than TMUC)
with a wrtmuc signal, the resulting instruction must still have just
one TMU write other than TMUC, but we were allowing the merge if one
instruction signaled wrtmuc and the other wrote to tmu other than tmuc
without testing if the combined result would have 2 tmu writes.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13527>
2021-10-27 06:03:12 +00:00
Juan A. Suarez Romero
b22ba69615 broadcom/qpu: remove duplicated opcode variable
`opcode` is wrote twice.

Fixes CID 1490798:  Incorrect expression  (EVALUATION_ORDER).

Fixes: 8a5f2228db ("broadcom/qpu: add new lookup opcode description helper")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12554>
2021-08-26 10:12:35 +00:00
Alejandro Piñeiro
a4cb756e4d broadcom/qpu: use and expand version info at opcode description
Right now opcode_desc struct, used to define data for all the
operations to pack/unpack, include a version field. In theory that
could be used to check if we are retrieving a opcode valid for our hw
version, or to get the correct opcode if a given one changed across hw
versions, or just the same if it didn't change.

In practice that field was not used. So for example, if by mistake we
asked for an opcode defined at version 41, while being on version 33
hardware, we would still get that opcode description.

This commit fixes that, and as we are here we expand the functionality
to allow to define version ranges, just in case a given opcode number
and their description is only valid for a given range.

v2 (from Iago feedback):
   * Fixed some comment typos
   * Simplified filtering opcode method
   * Rename filtering opcode method

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12301>
2021-08-19 01:08:14 +02:00
Alejandro Piñeiro
8a5f2228db broadcom/qpu: add new lookup opcode description helper
Right now there is a helper to get the opcode description from a
packed instruction, used on unpack related instructions. This commit
adds a helper that refactors the equivalent that is already in use on
pack related instructions.

Right now the helper is small, but we plan to extend it on following
commits in order to use the opcode description version field.

To avoid any possible confusion we rename the existing lookup helper.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12301>
2021-08-19 01:08:02 +02:00
Alejandro Piñeiro
ff74acabf5 broadcom/qpu: update/remove comments
* Remove one about waddr 6 being reserved, when at some point it
     become NOP

   * Fix one comment about reserved signals on v41 map, as 24 and 25
     are in fact defined. This seems a C&P issue (see v40 map).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12301>
2021-08-19 01:07:35 +02:00
Iago Toral Quiroga
87fa5908b3 broadcom/compiler: add FLAFIRST and FLNAFIRST opcodes
We will at least need the former to implement subgroupElect()

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11620>
2021-06-29 08:43:06 +02:00
Juan A. Suarez Romero
a77002584d broadcom/qpu: rename from VC5 to V3D
Get rid of old references to VC5.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10402>
2021-04-29 11:22:12 +02:00
Michel Dänzer
d200f45875 Use explicit break instead of fall-through to break-only case
clang generates a warning if there's no explicit break or fall-through
annotation. The latter would be kind of silly in this case, and not
robust against any future changes turning the fall-through invalid.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10220>
2021-04-15 16:01:22 +00:00
Iago Toral Quiroga
f33ca092da broadcom/compiler: add a NOP count stat to shader-db
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9918>
2021-03-31 05:51:22 +00:00
Iago Toral Quiroga
f68f209e39 broadcom/compiler: add a v3d_qpu_writes_accum helper
We have helpers to check if an instruction writes to specific
accumulators. This one will check if it writes any of the general
purpose accumulators, which will come in handy in a follow-up
patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9825>
2021-03-26 07:13:07 +00:00
Iago Toral Quiroga
21c1853c55 broadcom/compiler: ldvary doesn't implicitly write to r3 since V3D 4.1
total instructions in shared programs: 13805979 -> 13786037 (-0.14%)
instructions in affected programs: 2263244 -> 2243302 (-0.88%)
helped: 10646
HURT: 1508
Instructions are helped.

total threads in shared programs: 412220 -> 412242 (<.01%)
threads in affected programs: 58 -> 80 (37.93%)
helped: 17
HURT: 6
Threads are helped.

total uniforms in shared programs: 3793200 -> 3790401 (-0.07%)
uniforms in affected programs: 131281 -> 128482 (-2.13%)
helped: 1547
HURT: 281
Uniforms are helped.

total max-temps in shared programs: 2326309 -> 2324834 (-0.06%)
max-temps in affected programs: 31836 -> 30361 (-4.63%)
helped: 1139
HURT: 153
Max-temps are helped.

total spills in shared programs: 5932 -> 5940 (0.13%)
spills in affected programs: 80 -> 88 (10.00%)
helped: 2
HURT: 3

total fills in shared programs: 13370 -> 13372 (0.01%)
fills in affected programs: 480 -> 482 (0.42%)
helped: 2
HURT: 3

total sfu-stalls in shared programs: 30829 -> 30685 (-0.47%)
sfu-stalls in affected programs: 2190 -> 2046 (-6.58%)
helped: 570
HURT: 533
Sfu-stalls are helped.

total inst-and-stalls in shared programs: 13836808 -> 13816722 (-0.15%)
inst-and-stalls in affected programs: 2276152 -> 2256066 (-0.88%)
helped: 10643
HURT: 1525
Inst-and-stalls are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9430>
2021-03-05 13:37:39 +01:00
Eric Anholt
a687e71afd v3d/qpu: Avoid leaking memory in the QPU disasm test.
Required to run this test under ASan, as we'll be soon doing for building
ARM drivers with asan testing.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9070>
2021-02-18 00:49:00 +00:00
Iago Toral Quiroga
24db1a5112 broadcom/compiler: add a helper to check if an instruction writes unifa
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8980>
2021-02-12 08:24:21 +00:00
Iago Toral Quiroga
457ed5aa01 broadcom/compiler: name registers correctly based on V3D version
So we can differentiate between TMU for V3D 4.x and UNIFA for V3D 4.x,
which are aliased.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8980>
2021-02-12 08:24:21 +00:00
Iago Toral Quiroga
f85fcaa494 broadcom/compiler: pass a devinfo to check if an instruction writes to TMU
V3D 3.x has V3D_QPU_WADDR_TMU which in V3D 4.x is V3D_QPU_WADDR_UNIFA
(which isn't a TMU write address). This change passes a devinfo to
any functions that need to do these checks so we can account for the
target V3D version correctly.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8980>
2021-02-12 08:24:21 +00:00
Iago Toral Quiroga
449af48f42 broadcom/compiler: add V3D_QPU_WADDR_UNIFA
This only exists in V3D 4.x and aliases V3D_QPU_WADDR_TMU from V3D 3.x.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8980>
2021-02-12 08:24:21 +00:00
Alejandro Piñeiro
7059708dcd broadcom/qpu_instr: wait is not a read or write vpm instruction
For several schedule restrictions, we are checking if the instruction
is using the vpm. So far it was implemented as being a read or a write
of the vpm. But VPM wait (vpmwt) is not a read or a write (it is a
wait until all pending writes finishes). This is relevant to implement
peripheral accesses restrictions, as for some cases where vpm
read|writes are allowed, vpmwt is not.

Fixes:
  dEQP-VK.binding_model.descriptorset_random.sets8.constant.ubolimitlow.sbolimitlow.sampledimglow.outimgtexlow.noiub.nouab.vert.noia.0

On the sim, as it was raising an assert for wrong peripheral access.

v2: simplify v3d_qpu_waits_vpm (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6498>
2020-08-31 15:02:42 +02:00
Neil Roberts
b921d17aa6 broadcom/qpu: set VC5_QPU_RADDR_A out of the switch at _pack_branch
Detected after mesa added Wimplicit-fallthrough project wide.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5769>
2020-07-07 21:40:16 +02:00
Dylan Baker
a8e2d79e02 meson: use gnu_symbol_visibility argument
This uses a meson builtin to handle -fvisibility=hidden. This is nice
because we don't need to track which languages are used, if C++ is
suddenly added meson just does the right thing.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Eric Engestrom
79af30768d meson: inline inc_common
Let's make it clear what includes are being added everywhere, so that
they can be cleaned up.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Jose Maria Casanova Crespo
68bb26af63 broadcom: Fix implicit declaration of ffs for Android build
Include util/bitscan.h to ensure ffs is available when there is no
glibc like in Android.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1983
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
2020-02-06 18:31:13 +01:00
Iago Toral Quiroga
6e68f74395 v3d: add missing plumbing for VPM load instructions
We will need to use LDVPMG_IN specifically to read VPM inputs
in geometry shaders.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2019-12-16 08:42:37 +01:00
Eric Engestrom
d2d85b950d meson: replace libmesa_util with idep_mesautil
This automates the include_directories and dependencies tracking so that
all users of libmesa_util don't need to add them manually.

Next commit will remove the ones that were only added for that reason.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Eric Anholt <eric@anholt.net>
Tested-by: Vinson Lee <vlee@freedesktop.org>
2019-08-03 00:08:37 +00:00
Eric Engestrom
abc226cf41 tree-wide: replace MAYBE_UNUSED with ASSERTED
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-07-31 09:41:05 +01:00
Jose Maria Casanova Crespo
c341ab7ffb v3d: add shader-db stat to count SFU stalls
SFU operations have a latency of 2 cicles, so if their results
are used in the following cycle to a SFU instruction, the GPU
stalls for an extra cycle until the result is available.

This adds the number of stalls to the shader-db debug mode and
sum of instruction + stalls to evaluate optimizations to schedule
instructions that avoid generating sfu-stalls.

v2: Rename v3d_qpu_generates_sfu_stalls to v3d_qpu_instr_is_sfu (Eric)

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-07-22 03:00:50 +02:00