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broadcom/qpu_instr: wait is not a read or write vpm instruction
For several schedule restrictions, we are checking if the instruction is using the vpm. So far it was implemented as being a read or a write of the vpm. But VPM wait (vpmwt) is not a read or a write (it is a wait until all pending writes finishes). This is relevant to implement peripheral accesses restrictions, as for some cases where vpm read|writes are allowed, vpmwt is not. Fixes: dEQP-VK.binding_model.descriptorset_random.sets8.constant.ubolimitlow.sbolimitlow.sampledimglow.outimgtexlow.noiub.nouab.vert.noia.0 On the sim, as it was raising an assert for wrong peripheral access. v2: simplify v3d_qpu_waits_vpm (Iago) Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6498>
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commit
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3 changed files with 19 additions and 5 deletions
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@ -658,8 +658,8 @@ qpu_compatible_peripheral_access(const struct v3d_device_info *devinfo,
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/* V3D 4.1 and later allow TMU read along with a VPM read or write, and
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* WRTMUC with a TMU magic register write (other than tmuc).
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*/
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if ((a->sig.ldtmu && v3d_qpu_uses_vpm(b)) ||
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(b->sig.ldtmu && v3d_qpu_uses_vpm(a))) {
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if ((a->sig.ldtmu && v3d_qpu_reads_or_writes_vpm(b)) ||
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(b->sig.ldtmu && v3d_qpu_reads_or_writes_vpm(a))) {
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return true;
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}
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@ -591,7 +591,6 @@ v3d_qpu_add_op_reads_vpm(enum v3d_qpu_add_op op)
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{
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switch (op) {
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case V3D_QPU_A_VPMSETUP:
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case V3D_QPU_A_VPMWT:
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case V3D_QPU_A_LDVPMV_IN:
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case V3D_QPU_A_LDVPMV_OUT:
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case V3D_QPU_A_LDVPMD_IN:
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@ -610,7 +609,6 @@ v3d_qpu_add_op_writes_vpm(enum v3d_qpu_add_op op)
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{
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switch (op) {
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case V3D_QPU_A_VPMSETUP:
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case V3D_QPU_A_VPMWT:
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case V3D_QPU_A_STVPMV:
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case V3D_QPU_A_STVPMD:
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case V3D_QPU_A_STVPMP:
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@ -737,10 +735,25 @@ v3d_qpu_writes_vpm(const struct v3d_qpu_instr *inst)
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return false;
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}
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static bool
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v3d_qpu_waits_vpm(const struct v3d_qpu_instr *inst)
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{
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return inst->type == V3D_QPU_INSTR_TYPE_ALU &&
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inst->alu.add.op == V3D_QPU_A_VPMWT;
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}
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bool
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v3d_qpu_reads_or_writes_vpm(const struct v3d_qpu_instr *inst)
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{
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return v3d_qpu_reads_vpm(inst) || v3d_qpu_writes_vpm(inst);
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}
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bool
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v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst)
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{
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return v3d_qpu_reads_vpm(inst) || v3d_qpu_writes_vpm(inst);
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return v3d_qpu_reads_vpm(inst) ||
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v3d_qpu_writes_vpm(inst) ||
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v3d_qpu_waits_vpm(inst);
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}
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bool
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@ -462,6 +462,7 @@ bool v3d_qpu_uses_mux(const struct v3d_qpu_instr *inst, enum v3d_qpu_mux mux);
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bool v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_reads_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_writes_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_reads_or_writes_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_reads_flags(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_writes_flags(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_sig_writes_address(const struct v3d_device_info *devinfo,
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