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broadcom/compiler: add a v3d_qpu_writes_accum helper
We have helpers to check if an instruction writes to specific accumulators. This one will check if it writes any of the general purpose accumulators, which will come in handy in a follow-up patch. Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9825>
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2 changed files with 45 additions and 30 deletions
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@ -794,26 +794,33 @@ v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst)
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v3d_qpu_waits_vpm(inst);
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}
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static bool
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qpu_writes_magic_waddr_explicitly(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *inst,
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uint32_t waddr)
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{
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if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
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if (inst->alu.add.magic_write && inst->alu.add.waddr == waddr)
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return true;
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if (inst->alu.mul.magic_write && inst->alu.mul.waddr == waddr)
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return true;
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}
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if (v3d_qpu_sig_writes_address(devinfo, &inst->sig) &&
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inst->sig_magic && inst->sig_addr == waddr) {
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return true;
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}
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return false;
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}
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bool
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v3d_qpu_writes_r3(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *inst)
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{
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if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
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if (inst->alu.add.magic_write &&
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inst->alu.add.waddr == V3D_QPU_WADDR_R3) {
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return true;
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}
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if (inst->alu.mul.magic_write &&
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inst->alu.mul.waddr == V3D_QPU_WADDR_R3) {
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return true;
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}
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}
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if (v3d_qpu_sig_writes_address(devinfo, &inst->sig) &&
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inst->sig_magic && inst->sig_addr == V3D_QPU_WADDR_R3) {
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if (qpu_writes_magic_waddr_explicitly(devinfo, inst, V3D_QPU_WADDR_R3))
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return true;
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}
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return (devinfo->ver < 41 && inst->sig.ldvary) || inst->sig.ldvpm;
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}
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@ -850,26 +857,32 @@ bool
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v3d_qpu_writes_r5(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *inst)
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{
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if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
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if (inst->alu.add.magic_write &&
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inst->alu.add.waddr == V3D_QPU_WADDR_R5) {
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return true;
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}
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if (inst->alu.mul.magic_write &&
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inst->alu.mul.waddr == V3D_QPU_WADDR_R5) {
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return true;
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}
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}
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if (v3d_qpu_sig_writes_address(devinfo, &inst->sig) &&
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inst->sig_magic && inst->sig_addr == V3D_QPU_WADDR_R5) {
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if (qpu_writes_magic_waddr_explicitly(devinfo, inst, V3D_QPU_WADDR_R5))
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return true;
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}
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return inst->sig.ldvary || inst->sig.ldunif || inst->sig.ldunifa;
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}
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bool
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v3d_qpu_writes_accum(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *inst)
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{
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if (v3d_qpu_writes_r5(devinfo, inst))
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return true;
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if (v3d_qpu_writes_r4(devinfo, inst))
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return true;
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if (v3d_qpu_writes_r3(devinfo, inst))
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return true;
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if (qpu_writes_magic_waddr_explicitly(devinfo, inst, V3D_QPU_WADDR_R2))
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return true;
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if (qpu_writes_magic_waddr_explicitly(devinfo, inst, V3D_QPU_WADDR_R1))
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return true;
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if (qpu_writes_magic_waddr_explicitly(devinfo, inst, V3D_QPU_WADDR_R0))
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return true;
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return false;
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}
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bool
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v3d_qpu_uses_mux(const struct v3d_qpu_instr *inst, enum v3d_qpu_mux mux)
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{
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@ -462,6 +462,8 @@ bool v3d_qpu_writes_r4(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *instr) ATTRIBUTE_CONST;
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bool v3d_qpu_writes_r5(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *instr) ATTRIBUTE_CONST;
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bool v3d_qpu_writes_accum(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_waits_on_tmu(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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bool v3d_qpu_uses_mux(const struct v3d_qpu_instr *inst, enum v3d_qpu_mux mux);
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bool v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
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