Use explicit break instead of fall-through to break-only case

clang generates a warning if there's no explicit break or fall-through
annotation. The latter would be kind of silly in this case, and not
robust against any future changes turning the fall-through invalid.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10220>

src/amd/compiler/aco_insert_waitcnt.cpp

@@ -706,6 +706,7 @@ void gen(Instruction* instr, wait_ctx& ctx)
       if (instr->opcode == aco_opcode::s_sendmsg ||
           instr->opcode == aco_opcode::s_sendmsghalt)
          update_counters(ctx, event_sendmsg);
+      break;
    }
    default:
       break;

src/amd/compiler/aco_validate.cpp

@@ -585,6 +585,7 @@ bool validate_subdword_operand(chip_class chip, const aco_ptr<Instruction>& inst
    case aco_opcode::global_store_short_d16_hi:
       if (byte == 2 && index == 2)
          return true;
+      break;
    default:
       break;
    }
@@ -663,6 +664,7 @@ unsigned get_subdword_bytes_written(Program *program, const aco_ptr<Instruction>
    case aco_opcode::v_interp_p2_f16:
       if (chip >= GFX9)
          return 2;
+      break;
    default:
       break;
    }

src/broadcom/qpu/qpu_pack.c

@@ -1452,6 +1452,7 @@ v3d_qpu_instr_pack_branch(const struct v3d_device_info *devinfo,
 
                 *packed_instr |= QPU_SET_FIELD(instr->branch.offset >> 24,
                                                VC5_QPU_BRANCH_ADDR_HIGH);
+                break;
         default:
                 break;
         }

src/broadcom/qpu/tests/qpu_disasm.c

@@ -162,6 +162,7 @@ main(int argc, char **argv)
                                          &instr.alu.add.b);
                                 swap_pack(&instr.alu.add.a_unpack,
                                           &instr.alu.add.b_unpack);
+                                break;
                         default:
                                 break;
                         }

src/freedreno/vulkan/tu_descriptor_set.c

@@ -527,6 +527,7 @@ tu_CreateDescriptorPool(VkDevice _device,
       case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
       case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
          dynamic_count += pCreateInfo->pPoolSizes[i].descriptorCount;
+         break;
       default:
          break;
       }

src/freedreno/vulkan/tu_image.c

@@ -145,6 +145,7 @@ tu6_texswiz(const VkComponentMapping *comps,
             swiz[1] = A6XX_TEX_ZERO;
          }
       }
+      break;
    default:
       break;
    }

src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c

@@ -614,6 +614,7 @@ emit_instr(struct etna_compile *c, nir_instr * instr)
       break;
    case nir_instr_type_jump:
       assert(nir_instr_is_last(instr));
+      break;
    case nir_instr_type_load_const:
    case nir_instr_type_ssa_undef:
    case nir_instr_type_deref:

src/gallium/drivers/etnaviv/etnaviv_compiler_nir_ra.c

@@ -154,6 +154,7 @@ etna_ra_assign(struct etna_compile *c, nir_shader *shader)
          case nir_op_fcos:
             assert(dest->is_ssa);
             comp = REG_CLASS_VIRT_VEC2T;
+            break;
          default:
             break;
          }

src/gallium/drivers/iris/iris_state.c

@@ -4086,6 +4086,7 @@ iris_emit_sbe_swiz(struct iris_batch *batch,
             attr->ConstantSource = PRIM_ID;
             continue;
          }
+         break;
 
       default:
          break;

src/gallium/drivers/lima/ir/pp/codegen.c

@@ -541,6 +541,7 @@ static void ppir_codegen_encode_combine(ppir_node *node, void *code)
       default:
          break;
       }
+      break;
    }
    default:
       break;

src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c

@@ -1085,6 +1085,7 @@ store_dest(struct ntv_context *ctx, nir_dest *dest, SpvId result, nir_alu_type t
       switch (nir_alu_type_get_base_type(type)) {
       case nir_type_bool:
          assert("bool should have bit-size 1");
+         break;
 
       case nir_type_uint:
          break; /* nothing to do! */

src/intel/compiler/brw_eu_emit.c

@@ -2914,6 +2914,7 @@ brw_find_next_block_end(struct brw_codegen *p, int start_offset)
       case BRW_OPCODE_HALT:
          if (depth == 0)
             return offset;
+         break;
       default:
          break;
       }