Commit graph

1298 commits

Author SHA1 Message Date
Alyssa Rosenzweig
b0f8639382 asahi: Assert cache line alignment on Z/S buffers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
2022-09-18 10:34:25 -04:00
Alyssa Rosenzweig
89e0f54422 agx: Don't use nir_find_variable_with_driver_location
io_semantics is the preferred alternative.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
0883f0b302 agx: Lower txs to a descriptor crawl
There's no native txs instruction... but we can emulate one :-) This is
heavy on shader ALU, but in the production driver, it'll all be hoisted
up to the preamble shader and so it shouldn't matter much. This
keeps the driver itself simple and low overhead, with a completely
obvious generalization to bindless.

Passes dEQP-GLES3.functional.shaders.texture_functions.texturesize.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
bc4f418cb4 agx: Implement load_global(_constant)
Found in compute shaders, maps to a subset of device_load, and will be
used for some lowerings soon.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
965cc62bdd agx: Implement txd
Handles all cases except for cube maps, which don't seem to work
properly, so those are lowered.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
7a4e0a4d35 agx: Implement texture offsets and comparators
Texture offsets and shadow comparison values get grouped into a vector
passed by register. Comparison values are provided as-is (fp32). Texture
offsets are packed into nibbles, but we can do this on the CPU, as
nonconstant offsets are forbidden in GLSL at least. They're also
forbidden in Vulkan/SPIR-V without ImageGatherExtended/
shaderImageGatherExtended. I'm happy kicking the NIR lowering can down
the line, this commit is complicated enough already.

Passes dEQP-GLES3.functional.shaders.texture_functions.texture.* and
dEQP-GLES3.functional.shaders.texture_functions.textureoffset.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
4f85a7be8c agx: Make p_combine take a dynamic src count
For larger vectors.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:28 +00:00
Alyssa Rosenzweig
ef31dceee8 agx,asahi: Implement nir_intrinsic_load_texture_base_agx
Save off what we pass to BIND_TEXTURE.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:28 +00:00
Alyssa Rosenzweig
a7ddb8ebf7 asahi: Handle Stream Link VDM commands
Jumps in the command streams, allowing us to chain ("link") command
buffers. Naming is from PowerVR, which contains an identical command.
PowerVR's has conditional jumps and function call support, it's likely
that AGX inherited this too but I haven't tested that. (Those might be
useful for conditional rendering and secondary command buffers
respectively?)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
6f5c8d0e24 asahi: Express VDM commands according to PowerVR
Piles of unknown bits go away, as we find they're either "field present"
bits or block types. And yep, the block type enum lines up between AGX
and RGX.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
80d8273705 asahi: Annotate VDM/CDM commands as per PVR
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
22f6efde02 asahi: Dirty track everything
Now that we have fine grained state emit code, let's use it to reduce
driver overhead. Dirty tracking is delicate: while this seems to work,
I've also added an ASAHI_MESA_DEBUG=dirty option in debug builds
to disable the optimizations here for future debug.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
942bda7f2d asahi: Match PPP data structures with PowerVR
Looking at PowerVR's PPP definitions in tree in Mesa
(src/imagination/csbgen/), we find that AGX's "tagged" data structures
are actually sequences of state items prefixed by a header specifying
which state follows. Rather than hardcoding the sequences in which Apple's
driver chooses to bundle state, we need the XML to be flexible enough to
encode or decode any valid combination of state. That means reworking
the XML. While doing so, we find a number of fields that are identical
between RGX and AGX, and fix the names while at it (for example, the W
Clamp floating point).

Names are from the PowerVR code in Mesa where sensible.

Once we've reworked the XML, we need to rework the decoder.  Instead of
reading tags and printing the combined state packets, the decoder now
must unpack the header and print the individual state items specified by
the header, with slightly more complicated bounds checking.

Finally, state emission in the driver becomes much more flexible. To
prove the flexibility actually works, we now emit all PPP state (except for
viewport and scissor state) as a single PPP update. This works. After
this we can move onto more interesting arrangements of state for lower
driver overhead.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
baadc1ec13 asahi: Don't use lower_wpos_pntc
Instead we can flip point coords with the object type. That means fewer
instructions without shader variants. Thanks, PowerVR ^_^

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
f7ef5eefdd asahi: Identify object type field via PowerVR
src/imagination/csbgen/rogue_ppp.xml STATE_ISPA bits 28. Looks like that
got split into two structs in AGX (with info duplicated?) but yeah I
have a lot to work with here.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
d93878f77a asahi: Split RASTERIZER into constituent words
As done in the PowerVR driver.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-06 21:01:28 +00:00
Alyssa Rosenzweig
02babc834a asahi: Identify stencil test enable
There are a pair of flags controlling the stencil test. One enables
stencil testing in general, the other enables two-sided stencil. Compare
the identical "twosided" flag in src/imagination/csbgen/rogue_ppp.xml's
STATE_ISPCTL structure, at the samebit offset even. Evidently this word of
the "Rasterizer" is, in fact, a derivative of STATE_ISPCTL.

Fixes

   dEQP-GLES2.functional.fragment_ops.depth_stencil.*
   dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.*
   dEQP-GLES2.functional.fragment_ops.random.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
b891d60efa asahi: Fix depth/stencil buffers
There are a bunch of bits we need to set right to get depth/stencil
loads/stores working, including with independent settings for each. The
kernel "helps" us here.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
66f1164976 asahi: Add 1D and 1D Array enums
To finish out the enum.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
2bdb8ba3ce asahi: Correct SET_SHADER_EXTENDED disambig bit
This is still a guess, but a considerably firmer one as it now corrects
handles the clear pipelines emitted by Metal as well as the regular
vertex/fragment shader, and gets rid of the preshader special cases
seen there. Fixes decode of clear pipeline's preshaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
210f4aff1e asahi: Identify and use first level field of texture
As we recently discovered, the layout of level L of a mipmapped 2D image
of size WxH is /not/ the same as the layout of a non-mipmapped 2D image
of size minify(W, L) x minify(H, L). The difference occurs due to
subtleties of the "power of two" miptrees which can force a level to use
a larger tile size than it would have required at root level. To handle
this quirk correctly, the driver must not implement texture views with
address arithmetic -- it must supply instead the base width/height of a
texture and use first/last level fields on the texture descriptor to map
it. Similar issues occur when writing a particular level of a mipmapped
texture, which was handled correctly in the colour case but not the Z/S
case.

Fixes

   dEQP-GLES2.functional.texture.mipmap.cube.generate.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
1d72d3feb6 asahi: Fix "stride" for tiled textures
It doesn't exist, but there's a count of mip levels for writeable image
descs. Setting that appropriately matters at high mip levels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
4442be1155 asahi: Fix nonmipmapped array textures
pot_level can be greater than the number of levels actually included --
don't overallocate. Fix the issue and add a representative unit test.
Fixes:

   dEQP-GLES2.functional.texture.size.cube.512x512_rgb888

Fixes: 6ff75da8aa ("ail: Introduce image layout module")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
a41d732784 asahi: Fix depth for cube maps
For cube maps, depth=1 in the hardware (but 6 in Gallium). Likewise for
cube map arrays, depth=n in the hardware (but 6n in Gallium). We need to
divide to compensate. This will be relevant for cube map arrays in the
future -- add the dimension XML for cube map arrays too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
e66a901bc8 asahi: Relax assert in decoder
Seen == 0x8 with >4 render targets.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
9542f95864 asahi: Trim garbage at end of set shader
Unfortunately the actual size of this data structure is unclear.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
fb7860ed24 asahi: Handle empty fragment shaders
When an empty fragment shader is used with Metal, the stop command is
still included but this special bit is set, suppressing tilebuffer
access. Failing to do so but using empty shaders for u_blitter depth
clears causes Glitch Lina:

   https://twitter.com/LinaAsahi/status/1537869064793575424

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
968bbca578 asahi: Note some more unknowns in the XML
Lot of r/e waiting here...

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
47831969c8 asahi: Split up unk 2b
Seems to be flags.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
5f57fe0bc9 asahi: Fix Indexed Draw command
Add the missing stub in the decoder for it, so we can decode indexed
draws instead of reading back garbage, and fill in some known unknowns
in the structure.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
10c9aceadf agx: Plumb through nir_op_txf
nir_op_txf maps to AGX's texture_load, which is encoded like
texture_sample. The one outstanding question with this commit is the
rules for the sample required ... in NIR and APIs (including Metal), txf
is samplerless, but the AGX instruction consumes a sampler. Hopefully
any sampler will do, though?

Passes dEQP-GLES3.functional.shaders.texture_functions.texelfetch.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
44d79d39b6 agx: Defeature indirect vbufs
vb_mask can include garbage vbufs, we can't rely on it. This will
prevent a regression when switching to u_blitter based clears. This is
also simpler and shrinks the VS shader key so all in all a good thing.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
0fccd564b6 agx: Don't hardcode uniform enums
Let the compiler number them for us, the numbers are meaningless.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
18bb64fd3a agx: Add more unit tests for float copyprop
Would have caught the bug fixed by the previous commit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
095415cdf7 agx: Fix float copyprop of neg(neg) case
They should cancel each other. Fixes:

   dEQP-GLES2.functional.shaders.random.basic_expression.combined.0

Fixes: 28801b4849 ("agx: Add forward optimizing pass for fmov")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
9645e46a53 agx: Fix tib access in internal shaders
The only case where tilebuffer access can be specially optimized is the
st_tile used in internal clear (or reload) shaders. However, other
shaders (like those used with u_blitter) may have nir->info.internal
set, so we can't key off that. Instead, add a special key for this
optimization to ensure correctness with other internal shaders.

Fixes flaky tests in dEQP-GLES2.functional.color_clear.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
65c00ba7cb ail: Add unit tests for miptree layouts
The equations for calculating miptree offsets are complicated,
nonobvious, and full of subtle footguns. Worse, the driver doesn't
control the offsets -- it must simply agree with the offsets
implicitly calculated in the hardware. The CTS doesn't adequately
exercise all the corner cases. Make sure we have unit tests that do.

The tests themselves are generated by instrumenting agxdecode to scan
GPU memory after uploading test patterns in a variety of layout with a
Metal application.

Thank you to Asahi Lina and Dougall Johnson for the reverse-engineering
that led to this. The tests selected here are a subset of those used for
the reverse-engineering. The full set may be found in Lina's tilecalc
repo:

   https://github.com/asahilina/tilecalc

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
4ed9843a26 asahi: Advertise ASTC formats
Now that we have layout and tiling code that can handle block-compressed
formats, including the non-square blocks found with some ASTC formats,
we can advertise ASTC formats. Passes dEQP-GLES3.*astc* which
exercises everything here. (These tests passed before by decompressing
the textures to RGBA8 UNORM in the frontend, but it's much more
efficient to use real ASTC textures as done here.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
c71e84b37e asahi: Advertise ETC1
ETC2 is backwards compatible with ETC1, we just need to declare the
format mapping.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
b37b8eabd3 asahi: Handle 2-channel sRGB textures
I'm not sure why we need to set this magic bit, but this fixes the
non-depth_component portion of
dEQP-GLES3.functional.texture.format.sized.*, e.g

dEQP-GLES3.functional.texture.format.sized.cube.srgb_rg8_pot

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
464f59f723 ail: Rewrite tiled memcpy for correctness
Move tiling.c into ail, using ail data structures and helpers to manage
the tiling. This fixes a staggering number of issues with the tiling
routines:

* NPOT block sizes defeatured. The hardware only supports POT block
  sizes. There's no need to handle anything else.

* Use ail to determine tile sizes, instead of the broken
  agx_select_tile_shift routine that didn't work for non-square tile
  sizes (for instance).

* Handle up to 128x128 tiles, as required by 8bpp textures.

* Handle non-square tiles. If the block size is not a multiple of 4, the
  tile size will be of the form 2n x n. This is easy with the ail_tile
  data structure, but not possible architecturally with
  agx_select_tile_shift. This is required for 16bpp and 64bpp textures.

* Express in terms of elements instead of pixels, using unit
  suffixes to make the dimensional analysis obvious. In particular this
  handles tiling of block-compressed textures by tiling the blocks
  themselves. This is required for block-compressed textures (internally handled
  like smaller 64bpp textures).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
6ff75da8aa ail: Introduce image layout module
Introduce ail, a small library for working with the image (and buffer)
layouts encountered with AGX hardware. Its design is inspired by isl. In
particular, ail strives to use isl unit suffixes and to represent
quantities in a canonical, API-agnostic fashion [1].

ail replaces the old miptree code (based on some ad hoc heuristics that
passed a few dEQP tests). It is based on a thorough reverse-engineering
of AGX's twiddled format, courtesy of Asahi Lina, Dougall Johnson, and
me. This corrects our handling of many common cases that were totally
wrong in the old code, leading to GPU faults.

Unlike the code, ail differentiates between pixels and elements
consistently, allowing block-compressed formats like ETC2 to be
supported correctly. These formats will be enabled later in the series.

This commit fixes Inochi2D, glmark2 -brefract and -bterrain, and who
knows what else.

ail stands for { Asahi, AGX } Image { Layout, Library } at your
convenience. ail is best served warm.

Liberal use of ail is recommended. Yum!

[1] https://docs.mesa3d.org/isl/units.html

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
5057d6787a asahi: Fix ASTC enums
The ASTC enum only encodes the block width/height. By contrast the
LDR/HDR/sRGB distinction is encoded as UNORM/Float and via the sRGB bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
01323ba470 asahi: Fix bind sizes
Otherwise we get a nonsensical count of 129 in one Metal sample. Exact
size still not known but this bounds somewhat.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
e71f8ef439 asahi: Add XML for multisampled textures
Metal supports MSAA 2x and MSAA 4x, neither at the same time as
mipmapping. That matches the GL spec requirement.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
c8435e4bc6 asahi: Rename 'tiled 64x64' to 'twiddled'
To account for non-64x64 tile sizes, as well as the other forms of
tiling that may come up with compression.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
88eea62adb asahi: Identify compressed render target fields
We won't be implementing AGX compression for a while, but this gets some
unknowns out of the way when looking at dumps from Metal that use it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Emma Anholt
28b2252d0a nir: Make nir_lower_discard_if() handle demotes and terminates, too.
AGX and zink both want all of these lowered, but nir_to_tgsi will want
only demote (and terminate if it was possible from GLSL but it's not)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Jason Ekstrand
4fab5ae8ba asahi: Use util/bitpack_helpers.h
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18062>
2022-08-30 04:28:34 +00:00
Alyssa Rosenzweig
15e15422ba asahi: Fix warning building for macOS 12.0
Unnecessary rename that breaks forward compatibility... but Apple says
this is just NULL. Do the simpler thing. Note that the argument is a
mach_port_t, which is a natural_t == uint32_t in userspace... even
though it's a pointer in the kernel. Although Apple's docs claim that
kIOMasterPortDefault is NULL, it's really just 0.

../src/asahi/lib/agx_device.c:290:35: warning: 'kIOMasterPortDefault' is deprecated: first deprecated in macOS 12.0 [-Wdeprecated-declarations]
      IOServiceGetMatchingService(kIOMasterPortDefault, matching);
                                  ^~~~~~~~~~~~~~~~~~~~
                                  kIOMainPortDefault

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18121>
2022-08-21 14:32:40 -04:00