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asahi: Express VDM commands according to PowerVR
Piles of unknown bits go away, as we find they're either "field present" bits or block types. And yep, the block type enum lines up between AGX and RGX. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
This commit is contained in:
Alyssa Rosenzweig
Marge Bot
parent
80d8273705
commit
6f5c8d0e24
4 changed files with 246 additions and 103 deletions
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@ -129,13 +129,13 @@ agx_ppp_fini(uint8_t **out, struct agx_ppp_update *ppp)
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assert(ppp->gpu_base < (1ull << 40));
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assert(size_words < (1ull << 24));
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agx_pack(*out, RECORD, cfg) {
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agx_pack(*out, PPP_STATE, cfg) {
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cfg.pointer_hi = (ppp->gpu_base >> 32);
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cfg.pointer_lo = (uint32_t) ppp->gpu_base;
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cfg.size_words = size_words;
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};
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*out += AGX_RECORD_LENGTH;
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*out += AGX_PPP_STATE_LENGTH;
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}
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#endif
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@ -554,45 +554,19 @@
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<field name="Unk 7" size="16" start="6:16" type="hex" default="0x0"/> <!-- garbage? -->
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</struct>
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<!-- VDM commands start -->
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<!-- VDM commands start. VDM commands are padded out to 8b alignment. -->
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<enum name="VDM Block Type">
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<value name="PPP State Update" value="0"/>
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<value name="VDM State Update" value="2"/>
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<value name="Index List" value="3"/>
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<value name="Stream terminate" value="6"/>
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</enum>
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<!--- Command to bind a vertex pipeline, followed by subcommands. Counts are
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specified in 32-bit word units. Intepretation per-shader stage. -->
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<struct name="Bind vertex pipeline" size="24">
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<field name="Tag" size="32" start="0:0" type="hex" default="0x4000002e"/>
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<!-- 4 if more than 32 textures bound -->
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<field name="Unk 1" size="4" start="1:0" type="hex" default="0x2"/>
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<field name="Groups of 8 immediate textures" start="1:4" size="3" type="uint"/>
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<field name="Groups of 4 samplers" start="1:9" size="3" type="uint"/>
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<!-- When more than 48 textures bound, switches to 0x8, unk1 switches to
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0x6, and some funny sort of bindless access(?) is used in the shader -->
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<field name="Unk 2" size="4" start="1:12" type="hex" default="0x1"/>
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<field name="Padding 1" size="8" start="1:24" type="hex" default="0x0"/>
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<field name="Pipeline" size="32" start="2:0" type="address"/>
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<field name="Output count 1" size="8" start="3:0" type="uint" default="0"/>
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<field name="Output count 2" size="8" start="3:8" type="uint" default="0"/>
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<field name="Padding 2" size="16" start="3:16" type="hex" default="0x0"/>
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<field name="More than 4 textures" start="4:0" size="1" type="bool"/>
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<field name="Unk 3" size="32" start="5:0" type="address"/> <!-- C020000 -->
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</struct>
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<!-- Subcommands are packed inside sized records -->
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<struct name="Record" size="8">
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<field name="Pointer (hi)" size="8" start="0:0" type="hex"/>
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<field name="Size (words)" size="8" start="0:8" type="uint"/>
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<field name="Tag" size="16" start="0:16" type="hex" default="0x0000"/>
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<field name="Pointer (lo)" size="32" start="0:32" type="address"/>
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</struct>
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<!--- Command to issue a direct non-indexed draw -->
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<struct name="Draw" size="16">
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<field name="Unk" size="8" start="0:0" type="hex" default="0x0"/>
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<field name="Primitive" size="8" start="0:8" type="Primitive"/>
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<field name="Unk 2" size="8" start="0:16" type="hex" default="0xc0"/>
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<field name="Command" size="8" start="0:24" type="hex" default="0x61"/>
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<field name="Vertex count" size="32" start="1:0" type="uint"/>
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<field name="Instance count" size="32" start="2:0" type="uint"/> <!-- must be nonzero -->
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<field name="Vertex start" size="32" start="3:0" type="uint"/>
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<struct name="PPP State" size="8">
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<field name="Pointer (hi)" size="8" start="0" type="hex"/>
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<field name="Size (words)" size="8" start="8" type="uint"/>
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<field name="Block Type" size="3" start="29" type="VDM Block Type" default="PPP State Update"/>
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<field name="Pointer (lo)" size="32" start="32" type="address"/>
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</struct>
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<enum name="Index size">
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@ -601,21 +575,90 @@
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<value name="U32" value="2"/>
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</enum>
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<struct name="Indexed draw" size="32">
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<field name="Unk 1" size="8" start="0:0" type="hex" default="0x1"/>
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<field name="Command" size="8" start="0:24" type="hex" default="0x40"/>
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<field name="Restart index" size="32" start="1:0" type="hex"/>
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<field name="Primitive" size="8" start="2:8" type="Primitive"/>
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<field name="Restart enable" size="1" start="2:16" type="bool"/> <!-- Metal sets this bit for strips -->
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<field name="Index size" size="3" start="2:17" type="Index size"/>
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<field name="Unk 2c" size="4" start="2:20" type="hex" default="0xF"/>
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<field name="Draw Command" size="8" start="2:24" type="hex" default="0x61"/>
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<field name="Index buffer lo" size="32" start="3:0" type="hex"/>
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<field name="Index buffer hi" size="8" start="2:0" type="hex"/>
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<field name="Index count" size="32" start="4:0" type="uint"/>
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<field name="Instance count" size="32" start="5:0" type="uint"/>
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<field name="Base vertex" size="32" start="6:0" type="uint"/>
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<field name="Index buffer size" size="32" start="7:0" type="uint" modifier="shr(2)"/>
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<struct name="VDM State" size="4">
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<field name="Restart index present" size="1" start="0" type="bool"/>
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<field name="Vertex shader word 0 present" size="1" start="1" type="bool"/>
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<field name="Vertex shader word 1 present" size="1" start="2" type="bool"/>
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<field name="Vertex outputs present" size="1" start="3" type="bool"/>
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<field name="Vertex unknown present" size="1" start="5" type="bool"/>
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<field name="Block Type" size="3" start="29" type="VDM Block Type" default="VDM State Update"/>
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</struct>
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<struct name="VDM State Restart Index" size="4">
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<field name="Value" size="32" start="0" type="hex"/>
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</struct>
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<struct name="VDM State Vertex Shader Word 0" size="4">
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<!-- 4 if more than 32 textures bound -->
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<field name="Unk 1" size="4" start="0" type="hex" default="0x2"/>
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<field name="Groups of 8 immediate textures" start="4" size="3" type="uint"/>
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<field name="Groups of 4 samplers" start="9" size="3" type="uint"/>
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<!-- When more than 48 textures bound, switches to 0x8, unk1 switches to
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0x6, and some funny sort of bindless access(?) is used in the shader -->
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<field name="Unk 2" size="4" start="12" type="hex" default="0x1"/>
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<field name="Padding 1" size="8" start="24" type="hex" default="0x0"/>
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</struct>
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<struct name="VDM State Vertex Shader Word 1" size="4">
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<field name="Pipeline" size="32" start="0" type="address"/>
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</struct>
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<struct name="VDM State Vertex Outputs" size="4">
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<field name="Output count 1" size="8" start="0" type="uint" default="0"/>
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<field name="Output count 2" size="8" start="8" type="uint" default="0"/>
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<field name="Padding 2" size="16" start="16" type="hex" default="0x0"/>
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</struct>
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<struct name="VDM State Vertex Unknown" size="4">
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<!-- XXX Probably not? -->
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<field name="More than 4 textures" start="0" size="1" type="bool"/>
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</struct>
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<!--- Command to issue a direct non-indexed draw -->
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<struct name="Index List" size="4">
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<field name="Index buffer hi" size="8" start="0" type="hex"/>
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<field name="Primitive" size="8" start="8" type="Primitive"/>
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<!-- Metal sets this bit for strips, probably wrong though -->
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<field name="Restart enable" size="1" start="16" type="bool"/>
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<field name="Index size" size="3" start="17" type="Index size"/>
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<!-- XXX: Might be backwards, not sure how to check that -->
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<field name="Index buffer present" size="1" start="20" type="bool"/>
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<field name="Index buffer size present" size="1" start="21" type="bool"/>
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<!-- XXX: Might be mixed up, not sure how to check that -->
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<field name="Index count present" size="1" start="22" type="bool" default="true"/>
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<field name="Instance count present" size="1" start="23" type="bool" default="true"/>
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<field name="Start present" size="1" start="24" type="bool" default="true"/>
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<field name="Block Type" size="3" start="29" type="VDM Block Type" default="Index List"/>
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</struct>
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<struct name="Index List: Buffer lo" size="4">
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<!-- Index buffer lsb -->
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<field name="Buffer lo" size="32" start="0" type="hex"/>
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</struct>
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<struct name="Index List: Count" size="4">
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<!-- Vertex count for non-indexed, index count for index count -->
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<field name="Count" size="32" start="0" type="uint"/>
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</struct>
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<struct name="Index List: Instances" size="4">
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<field name="Count" size="32" start="0" type="uint"/> <!-- must be nonzero -->
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</struct>
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<struct name="Index List: Start" size="4">
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<!-- Base vertex for indexed draws -->
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<field name="Start" size="32" start="0" type="uint"/>
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</struct>
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<struct name="Index List: Buffer size" size="4">
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<field name="Size" size="32" start="0" type="uint" modifier="shr(2)"/>
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</struct>
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<struct name="Stream Terminate" size="8">
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<field name="Block Type" size="3" start="29" type="VDM Block Type" default="Stream Terminate"/>
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</struct>
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<!-- VDM commands end -->
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@ -464,24 +464,19 @@ static unsigned
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agxdecode_cmd(const uint8_t *map, bool verbose)
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{
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if (map[0] == 0x02 && map[1] == 0x10 && map[2] == 0x00 && map[3] == 0x00) {
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/* XXX: This is a CDM command not a VDM one */
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agx_unpack(agxdecode_dump_stream, map, LAUNCH, cmd);
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agxdecode_stateful(cmd.pipeline, "Pipeline", agxdecode_pipeline, verbose);
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DUMP_UNPACKED(LAUNCH, cmd, "Launch\n");
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return AGX_LAUNCH_LENGTH;
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} else if (map[0] == 0x2E && map[1] == 0x00 && map[2] == 0x00 && map[3] == 0x40) {
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agx_unpack(agxdecode_dump_stream, map, BIND_VERTEX_PIPELINE, cmd);
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agxdecode_stateful(cmd.pipeline, "Pipeline", agxdecode_pipeline, verbose);
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DUMP_UNPACKED(BIND_VERTEX_PIPELINE, cmd, "Bind vertex pipeline\n");
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return AGX_BIND_VERTEX_PIPELINE_LENGTH;
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} else if (map[3] == 0x40) {
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DUMP_CL(INDEXED_DRAW, map, "Indexed Draw");
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return AGX_INDEXED_DRAW_LENGTH;
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} else if (map[3] == 0x61) {
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DUMP_CL(DRAW, map, "Draw");
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return AGX_DRAW_LENGTH;
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} else if (map[2] == 0x00 && map[3] == 0x00) {
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/* No need to explicitly dump the record */
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agx_unpack(agxdecode_dump_stream, map, RECORD, cmd);
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}
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/* Bits 29-31 contain the block type */
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enum agx_vdm_block_type block_type = (map[3] >> 5);
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switch (block_type) {
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case AGX_VDM_BLOCK_TYPE_PPP_STATE_UPDATE: {
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agx_unpack(agxdecode_dump_stream, map, PPP_STATE, cmd);
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uint64_t address = (((uint64_t) cmd.pointer_hi) << 32) | cmd.pointer_lo;
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struct agx_bo *mem = agxdecode_find_mapped_gpu_mem_containing(address);
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@ -489,15 +484,74 @@ agxdecode_cmd(const uint8_t *map, bool verbose)
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if (mem)
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agxdecode_record(address, cmd.size_words * 4, verbose);
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else
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DUMP_UNPACKED(RECORD, cmd, "Non-existant record (XXX)\n");
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DUMP_UNPACKED(PPP_STATE, cmd, "Non-existant record (XXX)\n");
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return AGX_RECORD_LENGTH;
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} else if (map[1] == 0 && map[2] == 0 && map[3] == 0xC0 && map[4] == 0x00) {
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ASSERTED unsigned zero[4] = { 0 };
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assert(memcmp(map + 4, zero, sizeof(zero)) == 0);
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return AGX_PPP_STATE_LENGTH;
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}
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case AGX_VDM_BLOCK_TYPE_VDM_STATE_UPDATE: {
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size_t length = AGX_VDM_STATE_LENGTH;
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agx_unpack(agxdecode_dump_stream, map, VDM_STATE, hdr);
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map += AGX_VDM_STATE_LENGTH;
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#define VDM_PRINT(header_name, STRUCT_NAME, human) \
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if (hdr.header_name##_present) { \
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DUMP_CL(VDM_STATE_##STRUCT_NAME, map, human); \
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map += AGX_VDM_STATE_##STRUCT_NAME##_LENGTH; \
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length += AGX_VDM_STATE_##STRUCT_NAME##_LENGTH; \
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}
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VDM_PRINT(restart_index, RESTART_INDEX, "Restart index");
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VDM_PRINT(vertex_shader_word_0, VERTEX_SHADER_WORD_0, "Vertex shader word 0");
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if (hdr.vertex_shader_word_1_present) {
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agx_unpack(agxdecode_dump_stream, map, VDM_STATE_VERTEX_SHADER_WORD_1,
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word_1);
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fprintf(agxdecode_dump_stream, "Pipeline %X\n", (uint32_t) word_1.pipeline);
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agxdecode_stateful(word_1.pipeline, "Pipeline", agxdecode_pipeline, verbose);
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}
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VDM_PRINT(vertex_shader_word_1, VERTEX_SHADER_WORD_1, "Vertex shader word 1");
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VDM_PRINT(vertex_outputs, VERTEX_OUTPUTS, "Vertex outputs");
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VDM_PRINT(vertex_unknown, VERTEX_UNKNOWN, "Vertex unknown");
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#undef VDM_PRINT
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return ALIGN_POT(length, 8);
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}
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case AGX_VDM_BLOCK_TYPE_INDEX_LIST: {
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size_t length = AGX_INDEX_LIST_LENGTH;
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agx_unpack(agxdecode_dump_stream, map, INDEX_LIST, hdr);
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DUMP_UNPACKED(INDEX_LIST, hdr, "Index List\n");
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map += AGX_INDEX_LIST_LENGTH;
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#define IDX_PRINT(header_name, STRUCT_NAME, human) \
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if (hdr.header_name##_present) { \
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DUMP_CL(INDEX_LIST_##STRUCT_NAME, map, human); \
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map += AGX_INDEX_LIST_##STRUCT_NAME##_LENGTH; \
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length += AGX_INDEX_LIST_##STRUCT_NAME##_LENGTH; \
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}
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IDX_PRINT(index_buffer, BUFFER_LO, "Index buffer");
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IDX_PRINT(index_buffer_size, BUFFER_SIZE, "Index buffer size");
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IDX_PRINT(index_count, COUNT, "Index count");
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IDX_PRINT(instance_count, INSTANCES, "Instance count");
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IDX_PRINT(start, START, "Start");
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#undef IDX_PRINT
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return ALIGN_POT(length, 8);
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}
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case AGX_VDM_BLOCK_TYPE_STREAM_TERMINATE: {
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DUMP_CL(STREAM_TERMINATE, map, "Stream Terminate");
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return STATE_DONE;
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} else {
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return 0;
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}
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default:
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fprintf(agxdecode_dump_stream, "Unknown VDM block type: %u\n",
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block_type);
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hexdump(agxdecode_dump_stream, map, 8, false);
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return 8;
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}
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}
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@ -1512,18 +1512,40 @@ agx_encode_state(struct agx_context *ctx, uint8_t *out,
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#define IS_DIRTY(ST) !!(ctx->dirty & AGX_DIRTY_##ST)
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if (IS_DIRTY(VS)) {
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unsigned tex_count = ctx->stage[PIPE_SHADER_VERTEX].texture_count;
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agx_pack(out, BIND_VERTEX_PIPELINE, cfg) {
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cfg.pipeline = agx_build_pipeline(ctx, ctx->vs, PIPE_SHADER_VERTEX);
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cfg.output_count_1 = ctx->vs->info.varyings.vs.nr_index;
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cfg.output_count_2 = cfg.output_count_1;
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agx_pack(out, VDM_STATE, cfg) {
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cfg.vertex_shader_word_0_present = true;
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cfg.vertex_shader_word_1_present = true;
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cfg.vertex_outputs_present = true;
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cfg.vertex_unknown_present = true;
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}
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out += AGX_VDM_STATE_LENGTH;
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unsigned tex_count = ctx->stage[PIPE_SHADER_VERTEX].texture_count;
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agx_pack(out, VDM_STATE_VERTEX_SHADER_WORD_0, cfg) {
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cfg.groups_of_8_immediate_textures = DIV_ROUND_UP(tex_count, 8);
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cfg.groups_of_4_samplers = DIV_ROUND_UP(tex_count, 4);
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}
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out += AGX_VDM_STATE_VERTEX_SHADER_WORD_0_LENGTH;
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agx_pack(out, VDM_STATE_VERTEX_SHADER_WORD_1, cfg) {
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cfg.pipeline = agx_build_pipeline(ctx, ctx->vs, PIPE_SHADER_VERTEX);
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}
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out += AGX_VDM_STATE_VERTEX_SHADER_WORD_1_LENGTH;
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agx_pack(out, VDM_STATE_VERTEX_OUTPUTS, cfg) {
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cfg.output_count_1 = ctx->vs->info.varyings.vs.nr_index;
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cfg.output_count_2 = cfg.output_count_1;
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}
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out += AGX_VDM_STATE_VERTEX_OUTPUTS_LENGTH;
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agx_pack(out, VDM_STATE_VERTEX_UNKNOWN, cfg) {
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cfg.more_than_4_textures = tex_count >= 4;
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}
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out += AGX_VDM_STATE_VERTEX_UNKNOWN_LENGTH;
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out += AGX_BIND_VERTEX_PIPELINE_LENGTH;
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/* Pad up to a multiple of 8 bytes */
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memset(out, 0, 4);
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out += 4;
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}
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struct agx_pool *pool = &ctx->batch->pool;
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@ -1793,39 +1815,63 @@ agx_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
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enum agx_primitive prim = agx_primitive_for_pipe(info->mode);
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unsigned idx_size = info->index_size;
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uint64_t ib = idx_size ? agx_index_buffer_ptr(batch, draws, info) : 0;
|
||||
|
||||
if (idx_size) {
|
||||
uint64_t ib = agx_index_buffer_ptr(batch, draws, info);
|
||||
|
||||
/* Index sizes are encoded logarithmically */
|
||||
STATIC_ASSERT(__builtin_ctz(1) == AGX_INDEX_SIZE_U8);
|
||||
STATIC_ASSERT(__builtin_ctz(2) == AGX_INDEX_SIZE_U16);
|
||||
STATIC_ASSERT(__builtin_ctz(4) == AGX_INDEX_SIZE_U32);
|
||||
assert((idx_size == 1) || (idx_size == 2) || (idx_size == 4));
|
||||
|
||||
agx_pack(out, INDEXED_DRAW, cfg) {
|
||||
cfg.restart_index = info->restart_index;
|
||||
cfg.primitive = prim;
|
||||
agx_pack(out, VDM_STATE, cfg) cfg.restart_index_present = true;
|
||||
out += AGX_VDM_STATE_LENGTH;
|
||||
|
||||
agx_pack(out, VDM_STATE_RESTART_INDEX, cfg) {
|
||||
cfg.value = info->restart_index;
|
||||
}
|
||||
out += AGX_VDM_STATE_RESTART_INDEX_LENGTH;
|
||||
}
|
||||
|
||||
agx_pack(out, INDEX_LIST, cfg) {
|
||||
cfg.primitive = prim;
|
||||
cfg.index_count_present = true;
|
||||
cfg.instance_count_present = true;
|
||||
cfg.start_present = true;
|
||||
|
||||
if (idx_size) {
|
||||
cfg.restart_enable = info->primitive_restart;
|
||||
cfg.index_size = __builtin_ctz(idx_size);
|
||||
cfg.index_buffer_lo = (ib & BITFIELD_MASK(32));
|
||||
cfg.index_buffer_hi = (ib >> 32);
|
||||
cfg.index_buffer_size = ALIGN_POT(draws->count * idx_size, 4);
|
||||
cfg.index_count = draws->count;
|
||||
cfg.instance_count = info->instance_count;
|
||||
cfg.base_vertex = draws->index_bias;
|
||||
};
|
||||
cfg.index_size = __builtin_ctz(idx_size);
|
||||
cfg.index_buffer_present = true;
|
||||
cfg.index_buffer_size_present = true;
|
||||
}
|
||||
}
|
||||
out += AGX_INDEX_LIST_LENGTH;
|
||||
|
||||
out += AGX_INDEXED_DRAW_LENGTH;
|
||||
} else {
|
||||
agx_pack(out, DRAW, cfg) {
|
||||
cfg.primitive = prim;
|
||||
cfg.vertex_start = draws->start;
|
||||
cfg.vertex_count = draws->count;
|
||||
cfg.instance_count = info->instance_count;
|
||||
};
|
||||
if (idx_size) {
|
||||
agx_pack(out, INDEX_LIST_BUFFER_LO, cfg) {
|
||||
cfg.buffer_lo = ib & BITFIELD_MASK(32);
|
||||
}
|
||||
out += AGX_INDEX_LIST_BUFFER_LO_LENGTH;
|
||||
}
|
||||
|
||||
out += AGX_DRAW_LENGTH;
|
||||
agx_pack(out, INDEX_LIST_COUNT, cfg) cfg.count = draws->count;
|
||||
out += AGX_INDEX_LIST_COUNT_LENGTH;
|
||||
|
||||
agx_pack(out, INDEX_LIST_INSTANCES, cfg) cfg.count = info->instance_count;
|
||||
out += AGX_INDEX_LIST_INSTANCES_LENGTH;
|
||||
|
||||
agx_pack(out, INDEX_LIST_START, cfg) {
|
||||
cfg.start = idx_size ? draws->index_bias : draws->start;
|
||||
}
|
||||
out += AGX_INDEX_LIST_START_LENGTH;
|
||||
|
||||
if (idx_size) {
|
||||
agx_pack(out, INDEX_LIST_BUFFER_SIZE, cfg) {
|
||||
cfg.size = ALIGN_POT(draws->count * idx_size, 4);
|
||||
}
|
||||
out += AGX_INDEX_LIST_BUFFER_SIZE_LENGTH;
|
||||
}
|
||||
|
||||
batch->encoder_current = out;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue