Commit graph

20326 commits

Author SHA1 Message Date
Rhys Perry
463e3643f2 nir: add and use block predecessor helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40242>
2026-04-08 15:06:32 +00:00
Samuel Pitoiset
4e00e1c3d0 radv/meta: fix computing extent for image->image with both compressed formats
If both src and dst are compressed formats, adjusting the extent isn't
necessary because it's required that texel block extent matches. The
previous division was also wrong because it was truncating partial
blocks causing issues in some tests.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40678>
2026-04-08 13:11:55 +00:00
David Rosca
363447b7d0 radv/video: Use quality level for encode preset instead of tuning mode
qualityLevel as a speed/quality tradeoff is better match for encode presets
than the tuning mode. In addition we can support more quality levels than
what is available from tuning modes, this adds support for High Quality
preset on VCN4+.
This also makes it possible to use Low Latency tuning with balance and
quality presets.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40765>
2026-04-08 10:19:29 +00:00
Georg Lehmann
d1ed4e1774 aco/optimizer: do not try to create 3 byte constant operands
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Operand::get_const will assert.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15239
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40828>
2026-04-08 09:17:26 +00:00
Georg Lehmann
792ce7ddf6 aco/isel: optimize 16/64bit non constant valu bit test
By using the constant path we can combine the v_and and the v_cmp.

Foz-DB GFX1201:
Totals from 2 (0.00% of 205032) affected shaders:
Instrs: 2833 -> 2831 (-0.07%)
Latency: 27385 -> 27367 (-0.07%)
InvThroughput: 1712 -> 1710 (-0.12%)
VALU: 1301 -> 1299 (-0.15%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40705>
2026-04-08 08:44:20 +00:00
Marek Olšák
cec1024b22 ac,radv: remove AC_TRACKED_DB_VRS_OVERRIDE_CNTL as well
AC_TRACKED_DB_PA_SC_VRS_OVERRIDE_CNTL can be used instead because
the DB and PA registers are mutually exclusive.

2 definitions are moved because consecutive enums aren't allowed
to cross a multiple of 32 because of static assertions in the bitset.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40586>
2026-04-07 22:07:48 +00:00
Marek Olšák
623d2a9f3c radv,radeonsi: don't set PA_SC_HIS_INFO
the preamble sets it

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40586>
2026-04-07 22:07:48 +00:00
Marek Olšák
9c26b8b924 ac,radv: use AC_TRACKED_DB_PA_SC_VRS_OVERRIDE_CNTL for PA_SC_VRS_OVERRIDE_CNTL
The enum is meant to be used for both.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40586>
2026-04-07 22:07:48 +00:00
Natalie Vock
fded5e321d aco: Nuke ACO-side prolog selection
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40008>
2026-04-07 11:28:05 +00:00
Natalie Vock
afe519406b radv: Rewrite the RT prolog in NIR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40008>
2026-04-07 11:28:05 +00:00
Natalie Vock
b53dc3f052 aco/lower_to_hw_instr: Run p_init_scratch if the program has a call
Callees may use scratch even if the caller doesn't.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40008>
2026-04-07 11:28:05 +00:00
Natalie Vock
378c9536de aco/isel: Fix stack_ptr synthesis
info.stack_ptr.is_reg is always true. We have a stack pointer to use
if and only if the program is a callee.

Also, apply_scratch_offset needs to be true in a few more places.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40008>
2026-04-07 11:28:05 +00:00
Natalie Vock
31e08322d7 aco/spill_preserved: Only compute preserved registers if in a callee
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40008>
2026-04-07 11:28:05 +00:00
Natalie Vock
436acc321a radv: Disable RADV_DEBUG=llvm in release builds
The LLVM backend is unmaintained. Let's not encourage users to swap out
entire parts of the driver with an unsupported codepath. Enabling this
option is a footgun nowadays anyway, given that it disables many
features and thus may trigger bigger changes in behavior than intended.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40815>
2026-04-07 09:55:25 +00:00
Daniel Schürmann
58390ceb98 radv: increase limit for peephole_select in radv_optimize_nir_algebraic_early()
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Totals from 4868 (2.40% of 202440) affected shaders: (Navi48)

MaxWaves: 128008 -> 128004 (-0.00%); split: +0.04%, -0.05%
Instrs: 10006725 -> 9978721 (-0.28%); split: -0.31%, +0.03%
CodeSize: 54085500 -> 54018184 (-0.12%); split: -0.19%, +0.07%
VGPRs: 299524 -> 299584 (+0.02%); split: -0.10%, +0.12%
SpillSGPRs: 8707 -> 8669 (-0.44%); split: -0.48%, +0.05%
Latency: 79101292 -> 79243875 (+0.18%); split: -0.55%, +0.73%
InvThroughput: 13645193 -> 13731338 (+0.63%); split: -0.08%, +0.71%
VClause: 181709 -> 181485 (-0.12%); split: -0.23%, +0.10%
SClause: 222587 -> 221191 (-0.63%); split: -1.26%, +0.63%
Copies: 708979 -> 690992 (-2.54%); split: -2.71%, +0.17%
Branches: 232868 -> 223146 (-4.17%)
PreSGPRs: 275370 -> 274818 (-0.20%); split: -0.25%, +0.05%
PreVGPRs: 238859 -> 238907 (+0.02%); split: -0.01%, +0.03%
VALU: 5291185 -> 5291617 (+0.01%); split: -0.08%, +0.09%
SALU: 1610496 -> 1604458 (-0.37%); split: -0.68%, +0.30%
VMEM: 303401 -> 303037 (-0.12%)
SMEM: 358335 -> 357964 (-0.10%)
VOPD: 377180 -> 376374 (-0.21%); split: +0.05%, -0.27%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40708>
2026-04-07 08:00:04 +00:00
Samuel Pitoiset
71b6db06e1 ac/nir: add descriptor heap support to opt_flip_if_for_mem_loads()
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40702>
2026-04-07 06:15:24 +00:00
Samuel Pitoiset
1184610de4 ac/nir: add descriptor heap support to ac_nir_lower_image_tex()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40702>
2026-04-07 06:15:24 +00:00
Samuel Pitoiset
d2132ae011 ac/nir: adjust lowering of query size for descriptor heap
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40702>
2026-04-07 06:15:24 +00:00
Natalie Vock
5b76c1dd0c radv/rt: Don't combine config of unreachable shaders
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These can pessimize register estimation for no good reason.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40455>
2026-04-06 11:32:47 +00:00
Natalie Vock
c1a7680d93 radv/rt: Don't enable midpoint sorting
Midpoint sorting is incompatible with how our traversal works.
Specifically, we change tMax when a hit is committed so we can skip over
BVH nodes that are guaranteed not to produce a closer hit. However,
changing tMax also changes the intersection interval of box nodes with
the ray, and thus, the midpoints of that interval. Stackless traversal
relies on getting nodes back in the exact same order as before, and if
that requirement is not met, traversal may incorrectly skip over nodes.

The likely benefit of midpoint sorting does not make up for the loss of
ability to skip over BVH nodes exceeding tMax, so simply disable
midpoint sorting.

This fixes geometry being visible behind other geometry when it
shouldn't be in various applications, including Half-Life 2 RTX.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40795>
2026-04-06 11:03:04 +00:00
Mauro Rossi
e34fa5951d radv: Fix gnu-empty-initializer error in radv_shader_object.c
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Fixes the following building error happening with clang:

FAILED: src/amd/vulkan/libvulkan_radeon.so.p/radv_shader_object.c.o
...
../src/amd/vulkan/radv_shader_object.c:163:72: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
      struct radv_shader_debug_info debug[MESA_VULKAN_SHADER_STAGES] = {};
                                                                       ^
../src/amd/vulkan/radv_shader_object.c:164:53: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
      struct radv_shader_debug_info gs_copy_debug = {};
                                                    ^
../src/amd/vulkan/radv_shader_object.c:192:75: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
         struct radv_shader_debug_info debug[MESA_VULKAN_SHADER_STAGES] = {};
                                                                          ^
../src/amd/vulkan/radv_shader_object.c:193:56: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
         struct radv_shader_debug_info gs_copy_debug = {};
                                                       ^
../src/amd/vulkan/radv_shader_object.c:246:43: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info cs_dbg = {};
                                          ^
../src/amd/vulkan/radv_shader_object.c:465:69: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info debug[MESA_VULKAN_SHADER_STAGES] = {};
                                                                    ^
../src/amd/vulkan/radv_shader_object.c:468:50: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info gs_copy_debug = {};
                                                 ^
7 errors generated.

Fixes: 06b9660b ("radv: move radv_shader_create out of radv_compute_pipeline_compile")
Fixes: 2260105b ("radv: move radv_shader_create out of radv_graphics_shaders_compile")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40772>
2026-04-04 19:33:33 +00:00
Mauro Rossi
f7698f2b4a radv: Fix gnu-empty-initializer error in radv_pipeline_compute.c
Fixes the following building error happening with clang:

FAILED: src/amd/vulkan/libvulkan_radeon.so.p/radv_pipeline_compute.c.o
...
../src/amd/vulkan/radv_pipeline_compute.c:213:43: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info cs_dbg = {};
                                          ^
1 error generated.

Fixes: 06b9660b ("radv: move radv_shader_create out of radv_compute_pipeline_compile")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40772>
2026-04-04 19:33:33 +00:00
Mauro Rossi
8fed67c1fe radv: Fix gnu-empty-initializer error in radv_pipeline_rt.c
Fixes the following building error happening with clang:

FAILED: src/amd/vulkan/libvulkan_radeon.so.p/radv_pipeline_rt.c.o
...
../src/amd/vulkan/radv_pipeline_rt.c:537:42: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info debug = {};
                                         ^
1 error generated.

Fixes: 4c3a74be ("radv: move radv_shader_create out of radv_rt_nir_to_asm")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40772>
2026-04-04 19:33:33 +00:00
Mauro Rossi
f63e83676d radv: Fix gnu-empty-initializer error in radv_pipeline_graphics.c
Fixes the following building error happening with clang:

FAILED: src/amd/vulkan/libvulkan_radeon.so.p/radv_pipeline_graphics.c.o
...
../src/amd/vulkan/radv_pipeline_graphics.c:3199:69: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info debug[MESA_VULKAN_SHADER_STAGES] = {};
                                                                    ^
../src/amd/vulkan/radv_pipeline_graphics.c:3200:50: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info gs_copy_debug = {};
                                                 ^
2 errors generated.

Fixes: 2260105b ("radv: move radv_shader_create out of radv_graphics_shaders_compile")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40772>
2026-04-04 19:33:33 +00:00
Karol Herbst
02679a51fd radeonsi: set valid_buffer_range for CL buffers
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Seems like we never set the range for CL buffers which caused spurious
test fails in the CL CTS.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40683>
2026-04-04 14:54:40 +00:00
Boyuan Zhang
4fe64d23b8 ac/vcn_dec: add addr_mode for VCN 5.0.1
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VCN 5_0_1 uses gfx9 address mode. This was also set in previous
radeon_vcn_dec codes.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40736>
2026-04-01 10:32:20 -04:00
Samuel Pitoiset
21acbe414e vulkan: rename VK_EXT_device_fault features
They conflict with VK_KHR_device_fault.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40721>
2026-04-01 07:39:37 +00:00
Samuel Pitoiset
bf7e29617d radv: emit BOP events after every draw to workaround a VRS bug on GFX12
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/14812
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40715>
2026-04-01 07:11:45 +00:00
Samuel Pitoiset
dc5e84d47d radv: fix a typo when determining if a VS needs a prolog
This is harmless because shader_stages is filtered based on lib flags.
Also improve the comment while I'm at it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40714>
2026-04-01 06:49:16 +00:00
Emma Anholt
580381d9e7 vulkan/wsi/display: Check with an atomic commit if the swapchain fails.
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The TEST_ONLY flag lets you run your display configuration past the driver
to see if it exceeds any of the many arbitrary hardware limits that can't
be expressed through the limited properties that DRM exposes.  This maps
quite well to VK_ERROR_INITIALIZATION_FAILED.

Fixes dEQP-VK.wsi.direct_drm.colorspace.basic failure on my anv CFL
system, where we exceeded the primary plane's width restriction for the
specific tiling format chosen.

Closes: #14314
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39466>
2026-03-31 20:45:06 +00:00
Karol Herbst
73f0d8ed51 ci: add api@clgetmemobjectinfo to fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40726>
2026-03-31 17:39:47 +00:00
Georg Lehmann
5453419086 aco/isel: use s_bitcmp1 for 1bit ubfe
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Avoid the s_pack at the cost of having to use scc.

Foz-DB GFX1201:
Totals from 1514 (0.74% of 205032) affected shaders:
Instrs: 3443431 -> 3434096 (-0.27%); split: -0.27%, +0.00%
CodeSize: 19062100 -> 19024320 (-0.20%); split: -0.20%, +0.00%
Latency: 22343329 -> 22342802 (-0.00%); split: -0.01%, +0.01%
InvThroughput: 4471707 -> 4471632 (-0.00%); split: -0.00%, +0.00%
Copies: 280191 -> 279645 (-0.19%); split: -0.21%, +0.01%
PreSGPRs: 71333 -> 71327 (-0.01%)
VALU: 1598064 -> 1598058 (-0.00%); split: -0.00%, +0.00%
SALU: 691458 -> 686437 (-0.73%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40707>
2026-03-31 10:42:33 +00:00
Samuel Pitoiset
c4e3380187 nir,treewide: add nir_image_intrinsic_type
We have 4 image intrinsic variants now. This enum is useful for
nir_rewrite_image_intrinsic() and it will be used by other NIR passes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40709>
2026-03-31 09:10:27 +00:00
Samuel Pitoiset
cb469cc945 amd: bump required DRM version to 3.54 (Linux kernel 6.6+)
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40596>
2026-03-31 07:57:25 +00:00
Samuel Pitoiset
f4e6d656ba amd/drm-shim: bump version_minor to 54
Required by the next commit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40596>
2026-03-31 07:57:25 +00:00
Samuel Pitoiset
9d059a60f5 nir: introduce nir_descriptor_type for Vulkan like descriptors
This removes a Vulkan dependency in NIR core.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40670>
2026-03-31 07:16:20 +00:00
Samuel Pitoiset
182ad3974b radv: add RADV_DEBUG=fullsync
Useful for debugging missing barriers in games because this also
flushes caches compared to RADV_DEBUG=syncshaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40659>
2026-03-31 06:50:45 +00:00
Samuel Pitoiset
4087cf09af radv: improve dumping RGP captures
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With the per-submit mode, the driver was overwriting the existing file.
To fix that properly, add a RGP capture mode to add _frameXXX or
_submitXXX to the filenames.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40535>
2026-03-31 06:27:07 +00:00
Samuel Pitoiset
086f262185 radv: do not try to resize the SPM BO for per-submit captures
Resizing the buffer isn't possible for per-submit captures and it
doesn't make sense either. This introduces a new envvar called
RADV_CACHE_COUNTERS_BUFFER_SIZE to increase the SPM BO size if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40535>
2026-03-31 06:27:07 +00:00
Karol Herbst
b7ca34db13 nir: unvendor ac_nir_lower_sin_cos
So we can use it for Nvidia.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40541>
2026-03-31 01:47:31 +02:00
Karol Herbst
5bb3c9f69c nir: rename fsin_amd and fcos_amd to a more generic name
Nvidia implements both the same way as AMD does, so it makes sense to
allow for code sharing here.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40541>
2026-03-31 01:47:29 +02:00
Georg Lehmann
1b6ed1b34e nir,radv: lower shadow compare gather to 16bit
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The output is 1.0 or 0.0 anyway, so there are no precision issues.
For hardware that has v_fma_mix_f32, the inserted conversions should be free
in most cases.

Foz-DB Navi21:
Totals from 1393 (0.68% of 205005) affected shaders:
MaxWaves: 40612 -> 40660 (+0.12%)
Instrs: 571239 -> 570266 (-0.17%); split: -0.19%, +0.02%
CodeSize: 2933912 -> 2979304 (+1.55%); split: -0.00%, +1.55%
VGPRs: 50504 -> 50256 (-0.49%)
Latency: 9883143 -> 9879335 (-0.04%); split: -0.05%, +0.01%
InvThroughput: 2591073 -> 2570721 (-0.79%); split: -0.79%, +0.00%
VClause: 11600 -> 11551 (-0.42%); split: -0.43%, +0.01%
SClause: 26644 -> 26641 (-0.01%)
Copies: 31434 -> 30556 (-2.79%); split: -3.14%, +0.34%
PreVGPRs: 41762 -> 41509 (-0.61%)
VALU: 405533 -> 404655 (-0.22%); split: -0.24%, +0.03%
SALU: 55576 -> 55575 (-0.00%); split: -0.02%, +0.02%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40685>
2026-03-30 18:54:22 +00:00
Rhys Perry
3aea42e656 radv: create radv_rt_spirv_to_nir
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00
Rhys Perry
4c3a74bebe radv: move radv_shader_create out of radv_rt_nir_to_asm
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00
Rhys Perry
2260105ba1 radv: move radv_shader_create out of radv_graphics_shaders_compile
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00
Rhys Perry
618cad6bfe radv: move radv_shader_create out of radv_graphics_shaders_nir_to_asm
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00
Rhys Perry
6e2debe27c radv: copy spirv in radv_graphics_shaders_nir_to_asm instead
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00
Rhys Perry
06b9660baf radv: move radv_shader_create out of radv_compute_pipeline_compile
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00
Rhys Perry
41ffb087d2 radv: add radv_shader_debug_info parameter to radv_shader_create
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00
Rhys Perry
98f96bd076 radv: add radv_parse_binary_debug_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
2026-03-30 09:42:46 +00:00