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ac,radv: remove AC_TRACKED_DB_VRS_OVERRIDE_CNTL as well

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AC_TRACKED_DB_PA_SC_VRS_OVERRIDE_CNTL can be used instead because
the DB and PA registers are mutually exclusive.

2 definitions are moved because consecutive enums aren't allowed
to cross a multiple of 32 because of static assertions in the bitset.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40586>
This commit is contained in:
Marek Olšák 2026-04-03 14:32:21 -04:00 • committed by Marge Bot
parent 623d2a9f3c
commit cec1024b22
3 changed files with 5 additions and 7 deletions
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1
src/amd/common/ac_cmdbuf.c
View file

@ -873,7 +873,6 @@ ac_set_tracked_regs_to_clear_state(struct ac_tracked_regs *tracked_regs,
tracked_regs->reg_value[AC_TRACKED_DB_STENCIL_CONTROL] = 0;
tracked_regs->reg_value[AC_TRACKED_DB_DEPTH_BOUNDS_MIN] = 0;
tracked_regs->reg_value[AC_TRACKED_DB_DEPTH_BOUNDS_MAX] = 0;
tracked_regs->reg_value[AC_TRACKED_DB_VRS_OVERRIDE_CNTL] = 0;
tracked_regs->reg_value[AC_TRACKED_DB_ALPHA_TO_MASK] = 0;
if (info->gfx_level >= GFX9) {

9
src/amd/common/ac_cmdbuf.h
View file

@ -117,7 +117,6 @@ enum ac_tracked_reg
AC_TRACKED_DB_EQAA,
AC_TRACKED_DB_RENDER_OVERRIDE2,
AC_TRACKED_DB_SHADER_CONTROL,
AC_TRACKED_DB_VRS_OVERRIDE_CNTL,
AC_TRACKED_DB_STENCIL_REF,
AC_TRACKED_DB_ALPHA_TO_MASK,
AC_TRACKED_CB_COLOR_CONTROL,
@ -243,15 +242,15 @@ enum ac_tracked_reg
AC_TRACKED_COMPUTE_PGM_RSRC1,
AC_TRACKED_COMPUTE_PGM_RSRC2,
/* 2 consecutive registers. */
AC_TRACKED_COMPUTE_DISPATCH_SCRATCH_BASE_LO, /* GFX11+ */
AC_TRACKED_COMPUTE_DISPATCH_SCRATCH_BASE_HI, /* GFX11+ */
/* 3 consecutive registers. */
AC_TRACKED_SPI_SHADER_GS_MESHLET_DIM, /* GFX11+ */
AC_TRACKED_SPI_SHADER_GS_MESHLET_EXP_ALLOC, /* GFX11+ */
AC_TRACKED_SPI_SHADER_GS_MESHLET_CTRL, /* GFX12+ */
/* 2 consecutive registers. */
AC_TRACKED_COMPUTE_DISPATCH_SCRATCH_BASE_LO, /* GFX11+ */
AC_TRACKED_COMPUTE_DISPATCH_SCRATCH_BASE_HI, /* GFX11+ */
/* This spot is only for new SH and UCONFIG register enums.
* Context register enums should be before AC_NUM_TRACKED_CONTEXT_REGS.
*/

2
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -3903,7 +3903,7 @@ gfx103_emit_vrs_state(struct radv_cmd_buffer *cmd_buffer)
}
radeon_begin(cs);
radeon_opt_set_context_reg(R_028064_DB_VRS_OVERRIDE_CNTL, AC_TRACKED_DB_VRS_OVERRIDE_CNTL,
radeon_opt_set_context_reg(R_028064_DB_VRS_OVERRIDE_CNTL, AC_TRACKED_DB_PA_SC_VRS_OVERRIDE_CNTL,
S_028064_VRS_OVERRIDE_RATE_COMBINER_MODE(mode) | S_028064_VRS_OVERRIDE_RATE_X(rate_x) |
S_028064_VRS_OVERRIDE_RATE_Y(rate_y));
radeon_end();