fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-06-17 06:38:21 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

radv: fix a typo when determining if a VS needs a prolog

Browse source 
This is harmless because shader_stages is filtered based on lib flags.
Also improve the comment while I'm at it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40714>
This commit is contained in:
Samuel Pitoiset 2026-03-30 17:40:50 +02:00 • committed by Marge Bot
parent 580381d9e7
commit dc5e84d47d
1 changed files with 4 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/amd/vulkan/radv_pipeline_graphics.c
View file

@ -1943,8 +1943,10 @@ radv_generate_graphics_state_key(const struct radv_device *device, const struct
key.vs.has_prolog = true;
}
/* Compile the pre-rasterization stages only when the vertex input interface is missing. */
if ((state->shader_stages && VK_SHADER_STAGE_VERTEX_BIT) && !state->vi) {
/* Make sure to require a VS prolog when the VS is compiled without the vertex input state (this
* can happen with GPL).
*/
if ((state->shader_stages & VK_SHADER_STAGE_VERTEX_BIT) && !state->vi) {
key.vs.has_prolog = true;
}