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radeonsi: set valid_buffer_range for CL buffers
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Seems like we never set the range for CL buffers which caused spurious
test fails in the CL CTS.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40683>
This commit is contained in:
Karol Herbst 2026-03-28 02:35:03 +01:00 • committed by Marge Bot
parent 8730c039bf
commit 02679a51fd
2 changed files with 4 additions and 2 deletions
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1
src/amd/ci/radeonsi-raven-fails.txt
View file

@ -46,7 +46,6 @@ api@clgetdeviceinfo,Fail
api@clgetextensionfunctionaddressforplatform,Fail
api@clgetkernelarginfo,Fail
api@cllinkprogram,Fail
custom@r600 create release buffer bug,Fail
program@build@vector-data-types,Fail
program@execute@builtin@builtin-float-nextafter-1.0.generated,Fail
program@execute@builtin@builtin-float-nextafter-1.0.generated@nextafter float1,Fail

5
src/gallium/drivers/radeonsi/si_compute.c
View file

@ -233,8 +233,10 @@ static void si_set_global_binding(struct pipe_context *ctx, unsigned first, unsi
for (i = 0; i < n; i++) {
uint64_t va;
uint32_t offset;
struct si_resource *res = si_resource(resources[i]);
pipe_resource_reference(&sctx->global_buffers[first + i], resources[i]);
va = si_resource(resources[i])->gpu_address;
util_range_add(&res->b.b, &res->valid_buffer_range, 0, res->b.b.width0);
va = res->gpu_address;
offset = util_le32_to_cpu(*handles[i]);
va += offset;
va = util_cpu_to_le64(va);
@ -925,6 +927,7 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info
if (!buffer) {
continue;
}
util_range_add(&buffer->b.b, &buffer->valid_buffer_range, 0, buffer->b.b.width0);
radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, buffer,
RADEON_USAGE_READWRITE | RADEON_PRIO_SHADER_RW_BUFFER);
}