Commit graph

3803 commits

Author SHA1 Message Date
Christoph Bumiller
44b3bfaa75 nv50: make sure half-long insns are paired
I chose to just convert unpaired 32 bit length instructions
after parsing all instructions, although it might be possible
to determine beforehand whether there would be any lone ones,
and then even do some swapping to bring them together ...
2009-05-28 16:06:21 +10:00
Christoph Bumiller
de651a228f nv50: enable KIL in register 19a8 2009-05-28 16:06:21 +10:00
Christoph Bumiller
dac709d0cf nv50: don't overwrite sources before they're used
This would have happened in p.e. ADD TEMP[0], TEMP[0].xyxy, TEMP[1]
or RCP/RSQ TEMP[i], TEMP[i].
2009-05-28 16:06:21 +10:00
Christoph Bumiller
f579a99cc6 nv50: put FP outputs where they belong
Depth output in fragment programs should end up in the first
register after the color outputs.
2009-05-28 16:06:20 +10:00
Christoph Bumiller
dd9ded42b9 nv50: modified FP attribute loading
VP outputs that should be loadable in the FP are mapped to
interpolant indices by HPOS, COL0 etc.; of course HPOS is
always written, so the highest byte of 1988 is a bitmask that
selects which components of HPOS are used for interpolants,
i.e. the FP inputs in COL0 start at index POPCNT(1988[24:28]).
2009-05-28 16:06:19 +10:00
Christoph Bumiller
e88ec312df nv50: inspect decl semantic and interpolation mode
Record interpolation mode for attributes while parsing declarations,
and also remember the indices of FP color inputs and FP depth output,
which has to end up in the highest output register.
2009-05-28 16:06:19 +10:00
Christoph Bumiller
bcecb8ff66 nv50: record last access to temp and attr regs
We now inspect the TGSI instructions in tx_prep to determine where
temps and FP attrs are last accessed.
This will enable us to reclaim some temporaries early and we also
use it to omit pre-loading FP attributes that aren't used.
2009-05-28 16:06:18 +10:00
Christoph Bumiller
7e7d3a87ec nv50: save some space in immediate buffer
We could do even better (like just allocating 1 value in alloc_immd),
but that's fine for now I guess.
2009-05-28 16:06:18 +10:00
Christoph Bumiller
aad31d69ce nv50: fix SIGN_SET case in tgsi_src 2009-05-28 16:06:17 +10:00
Christoph Bumiller
4a7cf8f66f nv50: set dst.z,w to 0,1 in SCS and XPD
According to tgsi-instruction-set.txt, if they are written, z and w
should be set to 0 and 1 respectively in SCS, and w to 1.0 in XPD.
2009-05-28 16:06:17 +10:00
Christoph Bumiller
229992d281 nv50: make LRP instruction nicer 2009-05-28 16:06:17 +10:00
Christoph Bumiller
9417582f39 nv50: fix some memory leaks in shader assembler 2009-05-28 16:06:16 +10:00
Ben Skeggs
65e3fb7b46 nouveau: explicitly request mappable buffers for the moment 2009-05-28 16:06:16 +10:00
Mike Kaplinksiy
713b636a0e draw: Fix assertion failure at fetch_emit_prepare 2009-05-27 22:53:59 -07:00
Brian Paul
b86067c610 softpipe: comments 2009-05-27 19:36:59 -06:00
Brian Paul
31deacb8d3 softpipe: include sp_winsys.h to silence warning (unprototyped function) 2009-05-27 19:30:07 -06:00
Brian Paul
5d75124db4 softpipe: fix flat shading provoking vertex for PIPE_PRIM_POLYGON
Use the first vertex, not the last.
2009-05-27 19:27:31 -06:00
Jonathan Adamczewski
2c007517b5 cell: perform triangle cull a little earlier
In spu_tri.c:setup_sort_vertices() triangles are culled after the
vertices are sorted.  This patch moves the check a little earlier
and performs the actual check a little faster through intrinsics and
a little trickery.

Reduced code size and less work is done before a triangle is deemed
OK to skip.
2009-05-21 08:19:00 -06:00
Jonathan Adamczewski
b4824520ec cell: unroll inner loop of spu_render.c:cmd_render()
It was taking approximately 50 cycles to extract the vertex indices,
calculate the vertex_header pointers and call tri_draw() for each
three vertices - .

Unrolled, it takes less than 100 cycles to extract, unpack,
calculate pointers and call tri_draw() eight times.  It does have a
nasty jump-tabled switch.  I'm sure that there's a better way...

Code size of spu_render.o gets larger due to the extra constants and
work in the inner loop, there are extra stack saves and loads
because there are more registers in use, and an assert.  spu_tri.o
gets a little smaller.
2009-05-21 08:18:03 -06:00
Corbin Simpson
3af0952bc9 r300-gallium: r500-fs: POW.
I feel so unclean.
2009-05-20 23:22:16 -07:00
Corbin Simpson
cfd241e8a6 r300-gallium: r500-fs: LRP.
Goddammit. This cannot be the "easy way." :C
2009-05-20 21:52:11 -07:00
Corbin Simpson
f1f0893eba r300-gallium: r500-fs: Combine function. 2009-05-20 16:53:45 -07:00
Corbin Simpson
d67fb5ea1d r300-gallium: Prevent assert when fogcoords are present.
Seems like this file is the source of all bad logic. (Pun intended.)
2009-05-20 16:05:11 -07:00
Corbin Simpson
d04c85d01b r300-gallium: Another constantbuf shader recompile test.
Less briefly... Shaders need to be recompiled if their constantbuf
offsets have changed. However, since we only change them from shaders if
immediates need to be emitted, we shouldn't bother if the shader doesn't
use immediates.
2009-05-20 14:55:03 -07:00
Corbin Simpson
4151c0ea91 r300-gallium: Raise constantbuf limits.
Still not correct, but really I don't care.
2009-05-20 14:38:22 -07:00
Corbin Simpson
364a4a8293 r300-gallium: fs: Remove cruft from way back when. 2009-05-20 14:17:27 -07:00
Corbin Simpson
0ba7f76233 radeon-gallium: Add surface_buffer_create callback. 2009-05-20 13:21:17 -07:00
Corbin Simpson
9e8de1b911 r300-gallium: Make surface_copy actually load the texture in shader. 2009-05-20 12:22:24 -07:00
Corbin Simpson
b22b6f0743 r300-gallium: Add missing R481 PCI ID.
Per 74cb2aba on xf86-video-ati.
2009-05-20 12:08:00 -07:00
Corbin Simpson
65946ef081 r300-gallium: Make surface_copy work, and refactor buffer validation. 2009-05-20 11:46:26 -07:00
Corbin Simpson
4550423211 radeon-gallium: Don't permit reading and writing a BO in one CS.
This fixes some silent problems in current libdrm_radeon.

surface_copy still locks up hard.
2009-05-20 07:18:08 -07:00
Jakob Bornecrantz
bd59dd69ba trace: Improve shader wrapping 2009-05-18 20:54:09 +01:00
Jakob Bornecrantz
7d11a392d7 st/dri: Only create new textures if drawable has changed 2009-05-18 20:54:09 +01:00
Corbin Simpson
d0639d067e r300-gallium: Fix (another) wrong value in MSPOS.
Again, thanks to agd5f.
2009-05-18 09:51:10 -07:00
Corbin Simpson
026f4c97dc radeon-gallium: Remove BO validation debug.
It appears that that area of code "just works" much like classic Mesa's
version, so might as well not waste scrollback on it.
2009-05-18 09:51:10 -07:00
Corbin Simpson
5236ea3900 r300-gallium: Cleanup viewport state setup. 2009-05-18 09:51:09 -07:00
Corbin Simpson
301d238c1a r300-gallium: Always do VTE, never software viewport.
This makes glxgears draw properly with SW TCL.
2009-05-18 09:51:09 -07:00
Brian Paul
edfbf7dccb Merge branch 'mesa_7_5_branch'
Conflicts:

	Makefile
	src/mesa/main/version.h
2009-05-18 10:36:50 -06:00
Brian Paul
30320f0afb softpipe: add texture target sanity check assertion 2009-05-18 10:13:44 -06:00
Corbin Simpson
27206add27 r300-gallium: Enable GLSL for r500.
Before you get all excited, this is *not* to be construed as actual support
for GLSL shaders. The GL version is still 1.3, and stuff still sucks. Just
flicking it on so that it can be tested and developed a bit easier.
2009-05-17 21:41:25 -07:00
Corbin Simpson
9569221563 r300-gallium: r500-fs: DDX and DDY support.
Oh, look, GLSL instructions. I wonder what I'll do next.
2009-05-17 21:40:16 -07:00
Corbin Simpson
0036f2ccba dri-gallium: Add GLSL support.
Oh, look, it's more features. :3
2009-05-17 21:39:11 -07:00
Corbin Simpson
06a7b798f2 r300-gallium: Add half-right COS and SIN.
HW trig does a premultiply by 2pi, where Mesa does another premultiply by pi.
This is a problem.
2009-05-17 21:10:07 -07:00
Corbin Simpson
572d7d1358 r300-gallium: Size mismatch. 2009-05-17 20:49:39 -07:00
Corbin Simpson
6a40d1e9d9 r300-gallium, radeon-gallium: Nuke gb_pipes from orbit.
See the previous commit for an explanation. This is just all the support code
for GB_TILE_CONFIG.
2009-05-17 17:03:15 -07:00
Corbin Simpson
d6e085bd76 r300-gallium: Don't set GB_TILE_CONFIG (in userspace.)
This accompanies kernel patches that make GB_TILE_CONFIG's various members
completely controlled in DRM.

GB_TILE_CONFIG has the following controls:
 - The number of GB (pixel) pipes enabled
 - The size and style of tiling
 - Subpixel precision (either 1/12 or 1/16)

Per airlied and glisse, userspace and kernel will now agree (always) on
a subpixel precision of 1/12, and tiling will always be kernel-controlled.
2009-05-17 16:44:39 -07:00
Corbin Simpson
60665ae627 r300-gallium: Clean up more invariant state.
GA_ENHANCE is now the kernel's problem.
2009-05-17 13:23:39 -07:00
Corbin Simpson
e5f5390f4b r300-gallium: Update XXX.
Lops work fine as long as HW TCL is off. (I think I know why.)
2009-05-17 12:51:18 -07:00
Corbin Simpson
fbcfcd9f5c r300-gallium: Correct default MSPOS.
Per agd5f.
2009-05-17 11:58:53 -07:00
Corbin Simpson
45435abcb9 r300-gallium: vs: Fix vert shader init.
Makes the last three commits suck much less. :3
2009-05-17 10:34:41 -07:00