Commit graph

157727 commits

Author SHA1 Message Date
Qiang Yu
360176b671 aco,radv: support symbol relocation in aco
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22727>
2023-04-28 11:33:28 +08:00
Jesse Natalie
3fc4ddd628 dzn: Expose core VK1.2 extensions that aren't optional
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22745>
2023-04-28 00:03:17 +00:00
Jesse Natalie
0b8a39498d dzn: Expose core VK1.1 extensions that aren't optional
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22745>
2023-04-28 00:03:17 +00:00
Lone_Wolf
f53e5efad7 compiler/clc: Fix embedded clang headers (microsoft-clc) for LLVM 16+
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7742

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22741>
2023-04-27 23:06:42 +00:00
Eric Engestrom
6a08dc7cab v3d: fix tfu_supports_tex_format() param type, and document why
tex_format should be `enum V3DX(Texture_Data_Formats)`, but using that enum
type in the header requires including `v3dx_pack.h`, which triggers circular
include dependencies issues, so use a `uint32_t` for now.

"fix" the one place that was using the correct enum, because doing so
triggers `-Wenum-int-mismatch` in GCC 13 as the function declaration
doesn't match the function definition.

Reported-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22739>
2023-04-27 22:17:48 +00:00
Danylo Piliaiev
4dd15177d0 ir3: documents (ss) flag for cat7 instructions
Blob produces "lock" instructions with (ss), so our past guess that
cat7 supports (ss) is true.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Mark Collins
85c6c9068a ir3/a7xx: Add definitions for (last) src GPR attribute
A new attribute on source GPRs reflecting if a certain usage of a
value is the last usage of it was added in A7xx. This is seemingly
a performance hint and doesn't affect anything when not applied.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
1613d767c1 ir3/a7xx: Document "alias" instruction
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
b909eda0b3 ir3: Document that stc has higher DST upper bound than we defined
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
11b2c54a9a ir3/a7xx: Add STSC definition
STore Shared Const - loads SIZE dwords from HLSQ_SHARED_CONSTS_IMM
starting from HLSQ_SHARED_CONSTS_IMM[SRC] and writing them to c[DST]

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
80f878b103 ir3/a7xx: Add new form of stg.a/ldg.a addressing
The new stg.a/ldg.a addressing form supersedes the a6xx's one.

The new form is:
 ldg.a.f32 r4.y, g[c0.z+r4.y+2], 4

There are no shift comparing to the a6xx:
 ldg.a.f32 r4.y, g[r0.z+(r4.y)<<2], 4

Also on a7xx the first src is allowed to be both const and gpr.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Danylo Piliaiev
3b0daf29e5 ir3/a7xx: Add new lock/unlock CS instructions
Seen at the end of every compuite shader:

 %shader_assmebly%
 lock
 unlock
 end

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Danylo Piliaiev
52ee3943eb ir3/a7xx: NOPs may have some no-op bits set
[00000001x_00000000x] nop	; dontcare bits in nop: 0000000100000000
[00000002x_00000000x] nop	; dontcare bits in nop: 0000000200000000

Doesn't seem to make them different from ordinary nops.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Danylo Piliaiev
569ed0f238 freedreno: Early exit in device matching if id doesn't have chip_id
Assert was wrong and caused issues when there are devices defined
after devices that are matched by chip_id.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Lionel Landwerlin
7ddc31c672 intel/fs: fix per vertex input clamping
Only apply the clamp in multi patch mode (where the input vertices
vary between [1, 32]).

The clamp NIR pass operates on lowered intrinsics so we need to call
it after the inputs have been lowered.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e25e17dd0c ("intel/fs: clamp per vertex input accesses to patchControlPoints")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8912
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22701>
2023-04-27 20:29:16 +00:00
Mike Blumenkrantz
79b3828e82 draw: fix robust ubo size calc
if the size of the constant buffer + stride overflows UINT32_MAX,
DIV_ROUND_UP will return 0, which is, in some sense, extremely robust,
but for general functionality it's not actually very robust

cc: mesa-stable

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22720>
2023-04-27 19:48:48 +00:00
Rob Clark
08ffa8e0d2 dri/android: Fix MSAA resolve
Commit f9a074dd55 ("dri2/android: Bypass throttling") dropped
unnecessary throtting in the SwapBuffers() path for android.  But
unfortunately MSAA resolve got tangled up in the throttle reason
flag.  So add a new flag that indicates "no throttingling, but yes
please do MSAA resolve".

Fixes: f9a074dd55 ("dri2/android: Bypass throttling")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22719>
2023-04-27 19:05:44 +00:00
antonino
5969541123 zink: set when pipeline dirty flag when multisample changes
Sets `gfx_pipeline_state.dirty` appropriately when
`gfx_pipeline_state.multisample` changes

Fixes: 14d5892609 ("zink: add to multisample field to `zink_gfx_pipeline_state`")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22736>
2023-04-27 16:24:51 +00:00
Thong Thai
9c4e3c9020 tgsi: use locale independent float and double parsing
The atof and strtod functions use the locale of the user when
determining if a decimal is a comma, ',' or a period, '.'. Thanks to
@fzwoch for helping find the cause of a shader-related issue.

Cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5760
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22699>
2023-04-27 15:43:33 +00:00
Thong Thai
27eafdcbd5 util: check and initialize locale before using it
Cc: mesa-stable

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22699>
2023-04-27 15:43:33 +00:00
Thong Thai
7373f25c09 mesa/main: rework locale setup/teardown
Cc: mesa-stable

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22699>
2023-04-27 15:43:33 +00:00
Ruijing Dong
306c6e12a5 frontends/va: define va av1 encoding caps
by having va av1 caps enabled, av1 vaapi encoding
is enabled.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
03c9a81959 radeonsi/vcn: use PIPE_ENC_FEATURE enum
Merge PIPE_H265_ENC_FEATURE into PIPE_ENC_FEATURE enum
because those are common flags, and it will be
used in AV1 encoder as well.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
5edbecb856 frontends/va: adding va av1 encoding functions
supported features:
- 8/10 bit encoding
- multi-layer (up to 4) encoding
- vbr/cbr rate control mode

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
35c2150988 radeonsi/vcn: add av1 encoding ib packages and get_info
add av1 encoding ib packages and enable the
get_info functions.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
4697b71c4e radeonsi/vcn: add some av1 encoding function
preparation for enabling av1 encoding in radeonsi,
adding the entropy related functioin.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
8b3295b9ed radeonsi/vcn: add av1 enc data structure
add av1 encoding related data structure.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
0b31c5a00c gallium/pipe: add av1 encoding data structure in pipe
add pipe av1 encoding data structure

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
f33f26e9ff radeonsi/vcn: add av1 dpb variables and cdf table
add av1 dpb variables and cdf table.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
b13f87031f radeonsi/vcn: remove extra zero bytes from bitstream
reason:
   extra bytes are not needed and not necessary
   in h264/h265 bitstreams, because they are in
   between NALs, the only problem is they consumed
   extra bits. And for av1 streams, that could be
   explained to something else, especially in
   multi-layer cases, that can cause syntax errors.

   ptr[6] represents the bitstream size,
   ptr[8] represents the extra zero bytes.

   The total number of bytes of the output
   should be ptr[6] - ptr[8]

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
bb08f061d9 radeonsi/vcn: merge get_output_format_param function
reason:
so far, the output_format_param function can be shared
by different encoders, and just for h264 encoder, there
is no 10bit encoding supported. This is to reduce
the repeated code before having av1 encoder.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
a4f96446fb radeonsi/vcn: enable swizzle mode in encoding ref frames.
swizzle mode in ref frames could potentially
improve encoding performance, the main reason
is just because linear mapping is the worst mode
for reference frames comparing to block level
mapping.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
0a11d5f598 radeonsi/vcn: enable 2 pass search center map
2 pass search map is a feature supported by VCN,
the main purpose is to enlarge motion search
range that in pre-encoding path the center global
motion vectors could be obtained and used in the
final path as a block center base. When 2pass is
used, this feature will be automatically enabled.

2 pass feature can be enabled by ffmpeg command
line "-compression_level 1"

and also correct some typos and move quality
package from vcn3.0 to vcn2.0 since it is availabe
in vcn2.0 and vcn3.0 can use it directly. Correct
vcn3.0 hevc spec misc IB package.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
869c34c1ca radeonsi/vcn: add macros used in av1 encoding
add macros used in av1 encoding.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Rhys Perry
d0caa50dcd aco: don't move exec writes around exec writes
Not sure if this is possible, but we should avoid it anyway.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22714>
2023-04-27 14:33:53 +00:00
José Roberto de Souza
65265d3e32 anv: Take into consideration physical device max heap size to set maxStorageBufferRange
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22721>
2023-04-27 14:05:42 +00:00
David Heidelberg
7508f4b4b6 pvr: drop unused variable
Fixes: 71fe789d35 ("pvr: Support ipf_creq_pf in pvr_isp_ctrl_stream()")

Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22709>
2023-04-27 12:45:52 +00:00
Pierre-Eric Pelloux-Prayer
49cc6edf84 mesa: remove unused bools
ShareGroupReset and DisjointOperation where only set in the code
removed in the previous commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
71c5db5e11 mesa: don't share reset status across contexts
If Driver.GetGraphicsResetStatus exists for one context, other contexts
will be able to use it; so there's no need to inherit reset status from
the other contexts.

This also prevented implementing the spec correctly: we're supposed to
report GL_NO_ERROR when the reset is completed (after reporting GL_*_RESET
at least once):

    If a reset status other than NO_ERROR is returned and subsequent
    calls return NO_ERROR, the context reset was encountered and
    completed. If a reset status is repeatedly returned, the context may
    be in the process of resetting.

With the existing code, the contexts will report INNOCENT_CONTEXT_RESET
forever.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
b4a2cb1e16 winsys/amdgpu: use the no-op helper to detect if reset completion
On older kernel the completion of the reset isn't signalled to userspace,
yet we need it to implement the EXT_robustness extension correctly.

In this situation, try to create a new context and submit a no-op job. If
the reset isn't done the kernel will reject the submission (-ECANCELED);
otherwise the submission will go through and we'll know that the reset is
done.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
45cd75cdad winsys/amdgpu: add a helper function to submit a no-op job
This will be used in the next commit.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
e528823400 radeonsi: stop reporting reset to app once gpu recovery is done
This way apps know they can recreate their contexts when
the status go back to NO_ERROR.

This depends on new UAPI in the kernel; for older kernel, radeonsi
will stop reporting a reset after 3 seconds. Apps will be able to
create new contexts but they'll have to handle not being able to
submit tasks.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7460
Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Samuel Pitoiset
e996599ed0 ac/rgp: update SQTT_FILE_CHUNK_TYPE_ASIC_INFO to minor version 5
To match PAL. I don't know what the active_pixel_packer_mask field
is used for.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
dd91faaddc ac/rgp: update SQTT_FILE_CHUNK_TYPE_API_INFO to minor version 2
To match PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
4cbb0f7ec3 ac/sqtt: add missing EventUnknown to rgp_sqtt_marker_event_type
To match XGL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
637a6813db ac/sqtt: add new bits to rgp_sqtt_marker_barrier_end
To match XGL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
930e77e903 radv/sqtt: add support for queue info
RGP uses that to report the various queue timings info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Samuel Pitoiset
84a0ef7a33 radv/sqtt: sample CPU/GPU clocks before starting the trace
RGP seems to use that to calibrate timestamps. This also introduces
a new helper to reset thread data between captures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Samuel Pitoiset
ee93864117 ac/sqtt: initialize clock calibration/queue info/queue event records
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Samuel Pitoiset
94ce6540d8 ac/sqtt: add helpers for initializing ac_thread_trace_data
This is common between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00