This avoids sprinkling those all over the code base. Debug breakpoints
are put in there too.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Backport-to: 24.2
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31481>
This is implemented for us by vk_renderpass.c, so let's enable it and
get rid of the skips caused by a NULL dereference on
->CreateRenderPass2(), even though that's a CTS bug.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31462>
Replace the less-than test by a less-or-equal when checking the
dynamic buffer count.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31462>
As soon as we call RUN_IDVS, we need a valid tiler descriptor. Let's
kill the needs_tiling optimization until we have a proper way of
knowing when draws can be skipped or when IDVS jobs can be replaced
by plain compute.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31462>
Because we map compressed formats to the interchange-formats on V9 and
later, we end up not actually checking for compressed support here, but
instead always checking bit 0, which is reserved in the spec.
So let's instead explicitly check bitfeat_bit here instead, which we
conveniently stored away in the previous commit.
Use 1u instead of 1 for the shifted constant, to avoid undefined
behavior when we're testing bit 31.
Fixes: 0c1fde956b ("panfrost: Add Valhall compressed formats")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31419>
To avoid increasing memory usage, make sure we pack this together with
the hw format.
This will be used in the next commit.
Fixes: 0c1fde956b ("panfrost: Add Valhall compressed formats")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31419>
This reduces some duplication, and we're going to start needing the
texfeat format on valhall anyway...
Fixes: 0c1fde956b ("panfrost: Add Valhall compressed formats")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31419>
A7XX supports buffer-to-images copies with a lower alignment requirement
for the pitch and start VA, this makes it unnecessary to loop over every
row and copy them individually for any previously unaligned images. The
new alignment requirements match Vulkan requirements and should cover
all cases that aren't handled by 3D copies.
This can result in a significant performance improvement, up to 10x or
more in some cases.
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31401>
gcc 13.2 incorrectly evaluate that first_use is unitialized value.
This should avoid the bug and make code clearner.
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31476>
This can be triggered with DGC if the maximum number of sequences count
is too high. Luckily, vkd3d-proton doesn't do that, but it should be
fixed for EXT DGC.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31464>
The existing scan/reduce macros (OPC_SCAN_MACRO/OPC_SCAN_CLUSTERS_MACRO)
hard code the reduction operations in ir3. Adding support for 64b
operations will blow up these already complicated macros. Implement a
simple scan loop in NIR for the few (hopefully rare) cases where the
generic passes cannot lower the reduction to 32b.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31455>
ir3_nir_lower_64b_intrinsics will blindly set the def bit size to 32 for
unknown intrinsics. Give the generic passes a chance to lower them
first.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31455>
Don't use glsl_get_explicit_stride as it may return 0 for vector types,
use nir_deref_instr_array_stride instead.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31460>
A few EU validation tests had to be updated to account for larger GRF,
extra supported types for 3-src instructions and the lack of AccWrEnable
in Xe2.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31299>
There is this weird thing in the current tests that the linear & tiled
buffers are sized the same.
They don't need to be, compute a max area we want to check (aligned to
a tile logical size), allocate the linear buffer using that aligned
size and allocate the tiled buffer using a size aligned to the
physical tile size.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31469>
