intel/brw: Update DPAS validation tests for Xe2

The main change is that in Xe2 DPAS instruction requires SIMD16.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31299>
This commit is contained in:
Caio Oliveira 2024-09-20 21:14:16 -07:00
parent ee738c523a
commit 8b1c5425a9

View file

@ -2973,6 +2973,9 @@ TEST_P(validation_test, dpas_sdepth)
BRW_SYSTOLIC_DEPTH_8,
};
brw_set_default_exec_size(p, devinfo.ver >= 20 ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
for (unsigned i = 0; i < ARRAY_SIZE(depth); i++) {
brw_DPAS(p,
depth[i],
@ -3005,6 +3008,9 @@ TEST_P(validation_test, dpas_exec_size)
BRW_EXECUTE_32,
};
const brw_execution_size valid_exec_size =
devinfo.ver >= 20 ? BRW_EXECUTE_16 : BRW_EXECUTE_8;
for (unsigned i = 0; i < ARRAY_SIZE(test_vectors); i++) {
brw_set_default_exec_size(p, test_vectors[i]);
@ -3016,7 +3022,7 @@ TEST_P(validation_test, dpas_exec_size)
retype(brw_vec8_grf(16, 0), BRW_TYPE_HF),
retype(brw_vec8_grf(32, 0), BRW_TYPE_HF));
const bool expected_result = test_vectors[i] == BRW_EXECUTE_8;
const bool expected_result = test_vectors[i] == valid_exec_size;
EXPECT_EQ(expected_result, validate(p)) <<
"Exec size = " << (1u << test_vectors[i]);
@ -3128,6 +3134,9 @@ TEST_P(validation_test, dpas_sub_byte_precision)
},
};
brw_set_default_exec_size(p, devinfo.ver >= 20 ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
for (unsigned i = 0; i < ARRAY_SIZE(test_vectors); i++) {
brw_inst *inst =
brw_DPAS(p,
@ -3220,6 +3229,9 @@ TEST_P(validation_test, dpas_types)
#undef TV
brw_set_default_exec_size(p, devinfo.ver >= 20 ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
for (unsigned i = 0; i < ARRAY_SIZE(test_vectors); i++) {
brw_DPAS(p,
BRW_SYSTOLIC_DEPTH_8,
@ -3321,6 +3333,9 @@ TEST_P(validation_test, dpas_src_subreg_nr)
#undef TV
brw_set_default_exec_size(p, devinfo.ver >= 20 ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
for (unsigned i = 0; i < ARRAY_SIZE(test_vectors); i++) {
struct brw_reg dst =
retype(brw_vec8_grf( 0, 0), test_vectors[i].dst_type);