Commit graph

17107 commits

Author SHA1 Message Date
Samuel Pitoiset
d1a2ba57f9 radv: fix a GPU hang with inherited rendering and HiZ/HiS on GFX1201
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
With secondary command buffers, inherited rendering can be used but
it's basically impossible to know if the depth/stencil attachment
enabled HiZ/HiS. But it's required to disable WALK_ALIGN8 to avoid
GPU hangs.

This assumes that HiZ/HiS is enabled for inherited rendering as long
as a depth/stencil attachment is used. It's not the most optimal
approach but it's not supposed to hurt either.

This fixes a GPU hang with
dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.contents_secondary_cmdbuffers
and friends.

GFX1200 isn't affected because it doesn't support HiZ/HiS.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33986>
2025-03-11 14:14:25 +00:00
Georg Lehmann
5bfd1547d2 aco: don't assume that v_interp_mov_f32 flushes denorms
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Foz-DB Navi21:
Totals from 3 (0.00% of 79789) affected shaders:
Instrs: 1708 -> 1722 (+0.82%)
CodeSize: 9416 -> 9460 (+0.47%)
Latency: 12094 -> 12371 (+2.29%); split: -0.02%, +2.31%
InvThroughput: 1967 -> 1992 (+1.27%)
Copies: 105 -> 106 (+0.95%)
PreVGPRs: 131 -> 132 (+0.76%)
VALU: 1155 -> 1169 (+1.21%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33974>
2025-03-11 09:51:39 +00:00
Samuel Pitoiset
01f92acf10 radv/winsys: use real info for GFX12 in the null winsys
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33970>
2025-03-11 06:50:49 +00:00
Samuel Pitoiset
dd2e9c11af aco/tests: use GFX1201 instead of GFX1200
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33970>
2025-03-11 06:50:49 +00:00
Natalie Vock
a1b0599105 radv/rt: Flush L2 after writing internal node offset on GFX12
Otherwise the encoder can read a stale value and make internal nodes
point into leaf space (if 0 is read).

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33985>
2025-03-10 17:42:05 +00:00
Natalie Vock
cdadda2d51 radv/rt: Guard leaf encoding by leaf node count
For empty BVHs we shouldn't emit any leaf nodes, but there is one
invocation to encode the root node. Guard leaf node encoding so that
invocation doesn't try writing any leaves.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33985>
2025-03-10 17:42:05 +00:00
Samuel Pitoiset
964dc76f87 radv/ci: enable RADV_PERFTEST=video_{decode,encode} on few GFX9+ GPUs
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
VEGA10, RENOIR, NAVI10, RAPHAEL and NAVI31 are covered, they passed
100% of 25 runs each.

NAVI21 and VANGOGH still don't enable video testing in CI because I
got few hangs during my last stress test. Need to be stress tested
again.

Note that the kernel in Mesa CI is too old and doesn't have latest
firmwares that should fix the remaining failures.

GFX6-8 have different issues like GPU hangs on Polaris10, so it's not
yet enabled in CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33968>
2025-03-10 12:15:27 +00:00
Collabora's Gfx CI Team
94d2cc2531 Uprev Piglit to 708a9e365b18fdd881af989f75e1a6c1409cae8c
04d901e49d...708a9e365b

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33831>
2025-03-10 11:47:52 +00:00
Rhys Perry
b69b9b8eb2 amd/drm-shim: add gfx1201
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33953>
2025-03-10 11:21:36 +00:00
Samuel Pitoiset
0bc9d59c2e ac,radv: add a workaround for a hw bug with primitive restart on GFX10-GFX10.3
At least, NAVI10, NAVI21 and NAVI24 are affected by this what looks
like a hardware bug when primitive restart is changed and no context
registers are written between draws. It seems the hardware doesn't
consider primitive restart at all in this situation.

Adding SQ_NON_EVENT(0) as suggested by Marek seems to fix it reliably
without introducing any overhead. It's basically a NOP packet that adds
a small delay.

Fixes new VKCTS coverage dEQP-VK.transform_feedback.primitive_restart.*.
Also fixes this old vkd3d-proton issue.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7258
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33929>
2025-03-10 08:44:31 +00:00
Georg Lehmann
55921bd7ef radv/gfx10+: remove null exports if discard isn't used
Foz-DB Navi31:
Totals from 1362 (1.71% of 79789) affected shaders:
Instrs: 9879 -> 8497 (-13.99%)
CodeSize: 52004 -> 41028 (-21.11%)
Latency: 48821 -> 27349 (-43.98%)
InvThroughput: 7475 -> 7474 (-0.01%)
SALU: 274 -> 254 (-7.30%)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33835>
2025-03-07 15:00:37 +00:00
Georg Lehmann
09ff1c28d8 ac/nir/lower_ps_late: consider dcc decompression for null exports
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33835>
2025-03-07 15:00:37 +00:00
Georg Lehmann
ad73af6e68 radv: add dcc_decompress_gfx11 in radv_graphics_state_key
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33835>
2025-03-07 15:00:37 +00:00
Samuel Pitoiset
82ab58f6c6 radv: add RADV_DEBUG=pso_history
This dumps pipeline hash + shader VA to /tmp/radv_pso_history.log. Can
be very useful when investigating GPU hangs using UMR to get the fossils
back with the PC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33912>
2025-03-07 09:14:18 +01:00
Samuel Pitoiset
5f177018f7 radv/ci: re-enable ET2C emulation testing on non-native GPUs
This env variable was renamed except for CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33924>
2025-03-06 22:09:49 +00:00
Marek Olšák
40aac0681b ac,radeonsi: define all SDMA DCC fields & use them, enable compressed writes
SDMA supports HTILE, but SURF_TYPE must be set correctly.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:54 +00:00
Marek Olšák
e468321bee ac/cmdbuf: rework CB/DB cache controls for better perf
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:49 +00:00
Marek Olšák
73175ec0b6 ac/cmdbuf: split meta_*_policy to dcc and htile variables
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:49 +00:00
Marek Olšák
d2141e6751 ac/nir/ngg: add an option to skip viewport-based culling
We can do W and face culling when we have multiple viewports, but not
frustum and small prim culling because those are dependent on the viewport.
When a shader writes the viewport index, the new option allows skipping
viewport-based culling while keeping W and face culling.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:48 +00:00
Marek Olšák
d429e35169 ac/nir/cull: extract a helper calling accept_func
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:48 +00:00
Marek Olšák
177c9b173e Revert "ac/nir: clamp vertex color outputs in the right place"
This reverts commit b3fc49686e.

It was a rebase failure.

Fixes: b3fc49686e

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:47 +00:00
Marek Olšák
e99efe7164 ac,radeonsi: don't set num_slots/src/dest_type/write_mask when they're set automatically
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:47 +00:00
Marek Olšák
96722aeda3 ac/gpu_info: use max_good_cu_per_sa for computation of max_scratch_waves
every CU should be able to use scratch

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:46 +00:00
Rhys Perry
66130a51d3 radv: don't assume WGP mode in radv_get_max_waves
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33873>
2025-03-06 20:47:20 +00:00
Rhys Perry
17abc5f326 radv: improve radv_get_max_waves for multi-wave workgroups with LDS
LDS isn't divided among SIMDs, and it doesn't make sense to launch a
fraction of a compute workgroup.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33873>
2025-03-06 20:47:20 +00:00
Samuel Pitoiset
2a56afed8d radv: switch to device address from vk_buffer
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33897>
2025-03-06 09:46:01 +00:00
Assadian, Navid
9a88afecbd amd/vpelib: More parameters to the segmentation process and introduce validation hook
Generalization for the following:
1. pass in the scaler output alignment requirement to segment number determination function
2. parameter validation hook

Signed-off-by: Navid Assadian <Navid.Assadian@amd.com>
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Acked-by: Alan Liu <Haoping.Liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33833>
2025-03-06 02:11:53 +00:00
Zhao, Jiali
37c244998a amd/vpelib: Fix studio output CSC
Fix studio output CSC.

Signed-off-by: Jiali Zhao <Jiali.Zhao@amd.com>
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Evan Damphousse <Evan.Damphousse@amd.com>
Acked-by: Alan Liu <Haoping.Liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33833>
2025-03-06 02:11:53 +00:00
Visan, Tiberiu
da04cbca66 amd/vpelib: Apply normalization for full range
[WHY]
The full range needs to have the same brightness normalization like the
studio range.

[HOW]
Apply the same normalization.

Signed-off-by: Tiberiu Visan <Tiberiu.Visan@amd.com>
Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Acked-by: Alan Liu <Haoping.Liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33833>
2025-03-06 02:11:53 +00:00
Visan, Tiberiu
b3d43cea08 amd/vpelib: Fix studio range
[WHY]
Studio signal has an offset.

[HOW]
Subtract that offset.

Signed-off-by: Tiberiu Visan <Tiberiu.Visan@amd.com>
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Navid Assadian <Navid.Assadian@amd.com>
Acked-by: Alan Liu <Haoping.Liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33833>
2025-03-06 02:11:53 +00:00
Leder, Brendan Steve
69c331e2c0 amd/vpelib: Reformat index variables and update enum
Reformat index variables to indicate loop specifics and update enum to match formatting guide.

Signed-off-by: Brendan Steve Leder <Brendansteve.Leder@amd.com>
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Evan Damphousse <Evan.Damphousse@amd.com>
Acked-by: Alan Liu <Haoping.Liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33833>
2025-03-06 02:11:53 +00:00
Mike Blumenkrantz
7200cf8827 radv: don't unnecessarily flag prolog recalc when binding VBOs
another 25% for vkoverhead@draw_vbo_change_dynamic

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
4f71370830 radv: get vbo info directly into dgc upload
don't need this memcpy

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
b78835de13 radv: move non_trivial_format calc to dynamic VI bind
this otherwise gets pointlessly recalculated on every draw when a VBO changes

another 10% for vkoverhead@draw_vbo_change_dynamic

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
42db08c275 radv: split out dynamic vertex input descriptor writing
~25% boost to vkoverhead@draw_vbo_change_dynamic

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
22434edefc radv: inline some vertex descriptor functions
+5-7% in vkoverhead 16

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
00f51f7215 radv: eliminate a memset in radv_get_vbo_info()
very minor perf cost

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
e2ccd638a8 radv: roll line topology dynamic state changes into existing rast samples flag
this eliminates uploading rast samples whenever prim type changes even
when rast samples will not be changed

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
b2123314bd radv: store vertex prolog simple input check to cmdbuf on vs bind
no need to check this again and again

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
881d94a40a radv: store num_attributes to shader info
this eliminates a util_last_bit from the prolog hotpath

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Mike Blumenkrantz
d40dd4bfb7 radv: rewrite radv_get_line_mode() conditional
this was weirdly hard to parse

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
2025-03-06 01:26:02 +00:00
Samuel Pitoiset
f2eb31b1a2 spirv: move workarounds to an inner struct in spirv_to_nir_options
To be more explicit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33866>
2025-03-05 19:56:50 +00:00
Rhys Perry
0ec174afd5 aco: insert dependency waits in certain situations
This seems to fix some artifacts, but we're not sure why, so it might not
be a correct or optimal solution.

fossil-db (navi31):
Totals from 28424 (35.81% of 79377) affected shaders:
Instrs: 30112910 -> 30348977 (+0.78%); split: -0.00%, +0.78%
CodeSize: 159542980 -> 160485336 (+0.59%); split: -0.00%, +0.59%
Latency: 221438396 -> 221500856 (+0.03%); split: -0.00%, +0.03%
InvThroughput: 38154231 -> 38159984 (+0.02%); split: -0.00%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Backport-to: 25.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33853>
2025-03-05 16:22:54 +00:00
Samuel Pitoiset
ab4d2d447a radv: remove redundant radv_instance::drirc::rt_wave64
Use RADV_PERFTEST_RT_WAVE_64 instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33868>
2025-03-05 12:45:08 +00:00
Samuel Pitoiset
54a62c5c23 radv: use radv_emulate_rt() more
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33868>
2025-03-05 12:45:08 +00:00
Samuel Pitoiset
9108c198bb radv: fix trap handler exception options
They are same values.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33868>
2025-03-05 12:45:07 +00:00
Georg Lehmann
20dd6dfa12 aco/isel: use s_mul_i32 instead of s_cselect_b32 for a ? b : 0
It doesn't require SCC and this is more consistent with b2f.

Foz-DB Navi21:
Totals from 2107 (2.64% of 79789) affected shaders:
Instrs: 6619774 -> 6619280 (-0.01%); split: -0.01%, +0.00%
CodeSize: 36754448 -> 36752396 (-0.01%); split: -0.01%, +0.00%
Latency: 62207779 -> 62206422 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 13090494 -> 13090204 (-0.00%); split: -0.00%, +0.00%
VClause: 171572 -> 171573 (+0.00%)
SClause: 257528 -> 257530 (+0.00%)
Copies: 607680 -> 607204 (-0.08%); split: -0.10%, +0.02%
VALU: 4189422 -> 4189418 (-0.00%)
SALU: 1001750 -> 1001264 (-0.05%); split: -0.07%, +0.02%

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33734>
2025-03-04 21:36:17 +00:00
Georg Lehmann
2d68efd9f3 aco/opt_postRA: remove scc == 0 for more opcodes
Convert special case to s_cselect

Foz-DB Navi21:
Totals from 42 (0.05% of 79789) affected shaders:
Instrs: 91826 -> 91690 (-0.15%)
CodeSize: 496304 -> 495680 (-0.13%)
Latency: 1631974 -> 1631948 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 278772 -> 278766 (-0.00%)
SALU: 10627 -> 10491 (-1.28%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33734>
2025-03-04 21:36:17 +00:00
Georg Lehmann
83247ffa30 aco/opt_postRA: remove scc != 0 with multiple uses
These can always be removed.

Foz-DB Navi21:
Totals from 39 (0.05% of 79789) affected shaders:
Instrs: 138352 -> 138299 (-0.04%)
CodeSize: 710424 -> 710272 (-0.02%)
Latency: 468276 -> 468254 (-0.00%); split: -0.01%, +0.00%
InvThroughput: 108970 -> 108973 (+0.00%)
SALU: 18785 -> 18732 (-0.28%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33734>
2025-03-04 21:36:17 +00:00
Georg Lehmann
6445ba0f05 aco/opt_postRA: allow try_optimize_scc_nocompare for all instructions
If the old SCC source worked, the new one will too.

Foz-DB Navi21:
Totals from 106 (0.13% of 79789) affected shaders:
Instrs: 255233 -> 254825 (-0.16%)
CodeSize: 1337308 -> 1335692 (-0.12%)
Latency: 1455208 -> 1454524 (-0.05%); split: -0.05%, +0.00%
InvThroughput: 385624 -> 385612 (-0.00%); split: -0.00%, +0.00%
SALU: 53976 -> 53568 (-0.76%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33734>
2025-03-04 21:36:17 +00:00