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radv: split out dynamic vertex input descriptor writing
~25% boost to vkoverhead@draw_vbo_change_dynamic Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33806>
This commit is contained in:
Mike Blumenkrantz
Marge Bot
parent
22434edefc
commit
42db08c275
1 changed files with 113 additions and 97 deletions
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@ -5826,135 +5826,148 @@ radv_get_vbo_info(const struct radv_cmd_buffer *cmd_buffer, uint32_t idx, struct
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}
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ALWAYS_INLINE static void
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radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *vs, void *vb_ptr)
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radv_write_vertex_descriptor(const struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *vs, const unsigned i, const bool uses_dynamic_inputs, uint32_t *desc)
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{
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struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
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const struct radv_physical_device *pdev = radv_device_physical(device);
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enum amd_gfx_level chip = pdev->info.gfx_level;
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unsigned desc_index = 0;
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uint32_t mask = vs->info.vs.vb_desc_usage_mask;
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const bool uses_dynamic_inputs = vs->info.vs.dynamic_inputs;
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const struct radv_vertex_input_state *vi_state = &cmd_buffer->state.vertex_input;
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while (mask) {
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unsigned i = u_bit_scan(&mask);
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uint32_t *desc = &((uint32_t *)vb_ptr)[desc_index++ * 4];
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if (uses_dynamic_inputs && !(vi_state->attribute_mask & BITFIELD_BIT(i))) {
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/* No vertex attribute description given: assume that the shader doesn't use this
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* location (vb_desc_usage_mask can be larger than attribute usage) and use a null
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* descriptor to avoid hangs (prologs load all attributes, even if there are holes).
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*/
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memset(desc, 0, 4 * 4);
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return;
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}
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if (uses_dynamic_inputs && !(vi_state->attribute_mask & BITFIELD_BIT(i))) {
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/* No vertex attribute description given: assume that the shader doesn't use this
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* location (vb_desc_usage_mask can be larger than attribute usage) and use a null
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* descriptor to avoid hangs (prologs load all attributes, even if there are holes).
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*/
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memset(desc, 0, 4 * 4);
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continue;
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}
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struct radv_vbo_info vbo_info;
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radv_get_vbo_info(cmd_buffer, i, &vbo_info);
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struct radv_vbo_info vbo_info;
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radv_get_vbo_info(cmd_buffer, i, &vbo_info);
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uint32_t rsrc_word3;
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uint32_t rsrc_word3;
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if (uses_dynamic_inputs && vbo_info.non_trivial_format) {
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rsrc_word3 = vbo_info.non_trivial_format;
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} else {
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rsrc_word3 = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
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S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
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if (uses_dynamic_inputs && vbo_info.non_trivial_format) {
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rsrc_word3 = vbo_info.non_trivial_format;
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if (pdev->info.gfx_level >= GFX10) {
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rsrc_word3 |= S_008F0C_FORMAT_GFX10(V_008F0C_GFX10_FORMAT_32_UINT);
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} else {
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rsrc_word3 = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
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S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
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rsrc_word3 |=
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S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_UINT) | S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
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}
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}
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if (pdev->info.gfx_level >= GFX10) {
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rsrc_word3 |= S_008F0C_FORMAT_GFX10(V_008F0C_GFX10_FORMAT_32_UINT);
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} else {
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rsrc_word3 |=
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S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_UINT) | S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
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}
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if (!vbo_info.va) {
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if (uses_dynamic_inputs) {
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/* Stride needs to be non-zero on GFX9, or else bounds checking is disabled. We need
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* to include the format/word3 so that the alpha channel is 1 for formats without an
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* alpha channel.
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*/
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desc[0] = 0;
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desc[1] = S_008F04_STRIDE(16);
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desc[2] = 0;
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desc[3] = rsrc_word3;
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} else {
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memset(desc, 0, 4 * 4);
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}
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if (!vbo_info.va) {
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return;
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}
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const unsigned stride = vbo_info.stride;
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uint32_t num_records = vbo_info.size;
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if (vs->info.vs.use_per_attribute_vb_descs) {
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const uint32_t attrib_end = vbo_info.attrib_offset + vbo_info.attrib_format_size;
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if (num_records < attrib_end) {
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num_records = 0; /* not enough space for one vertex */
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} else if (stride == 0) {
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num_records = 1; /* only one vertex */
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} else {
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num_records = (num_records - attrib_end) / stride + 1;
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/* If attrib_offset>stride, then the compiler will increase the vertex index by
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* attrib_offset/stride and decrease the offset by attrib_offset%stride. This is
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* only allowed with static strides.
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*/
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num_records += vbo_info.attrib_index_offset;
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}
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/* GFX10 uses OOB_SELECT_RAW if stride==0, so convert num_records from elements into
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* into bytes in that case. GFX8 always uses bytes.
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*/
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if (num_records && (chip == GFX8 || (chip != GFX9 && !stride))) {
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num_records = (num_records - 1) * stride + attrib_end;
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} else if (!num_records) {
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/* On GFX9, it seems bounds checking is disabled if both
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* num_records and stride are zero. This doesn't seem necessary on GFX8, GFX10 and
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* GFX10.3 but it doesn't hurt.
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*/
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if (uses_dynamic_inputs) {
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/* Stride needs to be non-zero on GFX9, or else bounds checking is disabled. We need
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* to include the format/word3 so that the alpha channel is 1 for formats without an
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* alpha channel.
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*/
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desc[0] = 0;
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desc[1] = S_008F04_STRIDE(16);
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desc[2] = 0;
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desc[3] = rsrc_word3;
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} else {
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memset(desc, 0, 4 * 4);
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memset(desc, 0, 16);
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}
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continue;
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return;
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}
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} else {
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if (chip != GFX8 && stride)
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num_records = DIV_ROUND_UP(num_records, stride);
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}
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const unsigned stride = vbo_info.stride;
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uint32_t num_records = vbo_info.size;
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if (chip >= GFX10) {
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/* OOB_SELECT chooses the out-of-bounds check:
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* - 1: index >= NUM_RECORDS (Structured)
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* - 3: offset >= NUM_RECORDS (Raw)
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*/
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int oob_select = stride ? V_008F0C_OOB_SELECT_STRUCTURED : V_008F0C_OOB_SELECT_RAW;
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rsrc_word3 |= S_008F0C_OOB_SELECT(oob_select) | S_008F0C_RESOURCE_LEVEL(chip < GFX11);
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}
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if (vs->info.vs.use_per_attribute_vb_descs) {
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const uint32_t attrib_end = vbo_info.attrib_offset + vbo_info.attrib_format_size;
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uint64_t va = vbo_info.va;
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if (uses_dynamic_inputs)
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va += vbo_info.attrib_offset;
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if (num_records < attrib_end) {
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num_records = 0; /* not enough space for one vertex */
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} else if (stride == 0) {
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num_records = 1; /* only one vertex */
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} else {
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num_records = (num_records - attrib_end) / stride + 1;
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/* If attrib_offset>stride, then the compiler will increase the vertex index by
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* attrib_offset/stride and decrease the offset by attrib_offset%stride. This is
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* only allowed with static strides.
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*/
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num_records += vbo_info.attrib_index_offset;
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}
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desc[0] = va;
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desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(stride);
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desc[2] = num_records;
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desc[3] = rsrc_word3;
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}
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/* GFX10 uses OOB_SELECT_RAW if stride==0, so convert num_records from elements into
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* into bytes in that case. GFX8 always uses bytes.
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*/
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if (num_records && (chip == GFX8 || (chip != GFX9 && !stride))) {
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num_records = (num_records - 1) * stride + attrib_end;
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} else if (!num_records) {
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/* On GFX9, it seems bounds checking is disabled if both
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* num_records and stride are zero. This doesn't seem necessary on GFX8, GFX10 and
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* GFX10.3 but it doesn't hurt.
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*/
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if (uses_dynamic_inputs) {
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desc[0] = 0;
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desc[1] = S_008F04_STRIDE(16);
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desc[2] = 0;
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desc[3] = rsrc_word3;
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} else {
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memset(desc, 0, 16);
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}
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continue;
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}
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} else {
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if (chip != GFX8 && stride)
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num_records = DIV_ROUND_UP(num_records, stride);
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}
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if (chip >= GFX10) {
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/* OOB_SELECT chooses the out-of-bounds check:
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* - 1: index >= NUM_RECORDS (Structured)
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* - 3: offset >= NUM_RECORDS (Raw)
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*/
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int oob_select = stride ? V_008F0C_OOB_SELECT_STRUCTURED : V_008F0C_OOB_SELECT_RAW;
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rsrc_word3 |= S_008F0C_OOB_SELECT(oob_select) | S_008F0C_RESOURCE_LEVEL(chip < GFX11);
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}
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uint64_t va = vbo_info.va;
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if (uses_dynamic_inputs)
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va += vbo_info.attrib_offset;
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desc[0] = va;
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desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(stride);
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desc[2] = num_records;
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desc[3] = rsrc_word3;
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ALWAYS_INLINE static void
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radv_write_vertex_descriptors_dynamic(const struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *vs, void *vb_ptr)
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{
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unsigned desc_index = 0;
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for (unsigned i = 0; i < vs->info.vs.num_attributes; i++) {
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uint32_t *desc = &((uint32_t *)vb_ptr)[desc_index++ * 4];
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radv_write_vertex_descriptor(cmd_buffer, vs, i, true, desc);
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}
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}
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static void
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ALWAYS_INLINE static void
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radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *vs, void *vb_ptr)
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{
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unsigned desc_index = 0;
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u_foreach_bit(i, vs->info.vs.vb_desc_usage_mask) {
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uint32_t *desc = &((uint32_t *)vb_ptr)[desc_index++ * 4];
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radv_write_vertex_descriptor(cmd_buffer, vs, i, false, desc);
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}
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}
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ALWAYS_INLINE static void
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radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer)
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{
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struct radv_shader *vs = radv_get_shader(cmd_buffer->state.shaders, MESA_SHADER_VERTEX);
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struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
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bool uses_dynamic_inputs = vs->info.vs.dynamic_inputs;
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if (!vs->info.vs.vb_desc_usage_mask)
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return;
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@ -5962,7 +5975,7 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer)
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/* Mesh shaders don't have vertex descriptors. */
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assert(!cmd_buffer->state.mesh_shading);
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unsigned vb_desc_alloc_size = util_bitcount(vs->info.vs.vb_desc_usage_mask) * 16;
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unsigned vb_desc_alloc_size = (uses_dynamic_inputs ? vs->info.vs.num_attributes : util_bitcount(vs->info.vs.vb_desc_usage_mask)) * 16;
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unsigned vb_offset;
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void *vb_ptr;
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uint64_t va;
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@ -5971,7 +5984,10 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer)
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if (!radv_cmd_buffer_upload_alloc(cmd_buffer, vb_desc_alloc_size, &vb_offset, &vb_ptr))
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return;
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radv_write_vertex_descriptors(cmd_buffer, vs, vb_ptr);
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if (uses_dynamic_inputs)
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radv_write_vertex_descriptors_dynamic(cmd_buffer, vs, vb_ptr);
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else
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radv_write_vertex_descriptors(cmd_buffer, vs, vb_ptr);
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va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
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va += vb_offset;
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