fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-25 00:00:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

ac,radeonsi: don't set num_slots/src/dest_type/write_mask when they're set automatically

Browse source 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
This commit is contained in:
Marek Olšák 2024-12-24 11:26:20 -05:00 • committed by Marge Bot
parent 96722aeda3
commit e99efe7164
3 changed files with 5 additions and 23 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
src/amd/common/nir/ac_nir_meta_ps_resolve.c
View file

@ -63,10 +63,7 @@ ac_create_resolve_ps(const struct ac_ps_resolve_options *options,
nir_def *zero = nir_imm_int(&b, 0);
nir_def *baryc = nir_load_barycentric_pixel(&b, 32, .interp_mode = INTERP_MODE_SMOOTH);
nir_def *coord = nir_load_interpolated_input(&b, 2 + key->src_is_array, 32, baryc, zero,
.dest_type = nir_type_float32,
.io_semantics = (nir_io_semantics){
.location = VARYING_SLOT_VAR0,
.num_slots = 1});
.io_semantics.location = VARYING_SLOT_VAR0);
/* Nearest filtering floors and then converts to integer, and then
* applies clamp to edge as clamp(coord, 0, dim - 1).
@ -158,9 +155,7 @@ ac_create_resolve_ps(const struct ac_ps_resolve_options *options,
nir_store_output(&b, result, zero,
.write_mask = BITFIELD_MASK(key->last_dst_channel + 1),
.src_type = key->d16 ? nir_type_float16 : nir_type_float32,
.io_semantics = (nir_io_semantics){
.location = FRAG_RESULT_DATA0,
.num_slots = 1});
.io_semantics.location = FRAG_RESULT_DATA0);
return b.shader;
}

9
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -2028,8 +2028,7 @@ static bool si_nir_lower_ps_color_input(nir_shader *nir, const union si_shader_k
nir_def *back_color = NULL;
if (interp_mode == INTERP_MODE_FLAT) {
colors[i] = nir_load_input(b, 4, 32, nir_imm_int(b, 0),
.io_semantics.location = VARYING_SLOT_COL0 + i,
.io_semantics.num_slots = 1);
.io_semantics.location = VARYING_SLOT_COL0 + i);
if (key->ps.part.prolog.color_two_side) {
back_color = nir_load_input(b, 4, 32, nir_imm_int(b, 0),
@ -2057,14 +2056,12 @@ static bool si_nir_lower_ps_color_input(nir_shader *nir, const union si_shader_k
colors[i] =
nir_load_interpolated_input(b, 4, 32, barycentric, nir_imm_int(b, 0),
.io_semantics.location = VARYING_SLOT_COL0 + i,
.io_semantics.num_slots = 1);
.io_semantics.location = VARYING_SLOT_COL0 + i);
if (key->ps.part.prolog.color_two_side) {
back_color =
nir_load_interpolated_input(b, 4, 32, barycentric, nir_imm_int(b, 0),
.io_semantics.location = VARYING_SLOT_BFC0 + i,
.io_semantics.num_slots = 1);
.io_semantics.location = VARYING_SLOT_BFC0 + i);
}
}

10
src/gallium/drivers/radeonsi/si_shaderlib_nir.c
View file

@ -327,29 +327,19 @@ void *si_get_blitter_vs(struct si_context *sctx, enum blitter_attrib_type type,
b.shader->info.io_lowered = true;
nir_def *pos = nir_load_input(&b, 4, 32, nir_imm_int(&b, 0),
.dest_type = nir_type_float32,
.io_semantics.num_slots = 1,
.io_semantics.location = VERT_ATTRIB_GENERIC0);
nir_store_output(&b, pos, nir_imm_int(&b, 0),
.src_type = nir_type_float32,
.io_semantics.num_slots = 1,
.io_semantics.location = VARYING_SLOT_POS);
if (type != UTIL_BLITTER_ATTRIB_NONE) {
nir_def *attr = nir_load_input(&b, 4, 32, nir_imm_int(&b, 0),
.dest_type = nir_type_float32,
.io_semantics.num_slots = 1,
.io_semantics.location = VERT_ATTRIB_GENERIC1);
nir_store_output(&b, attr, nir_imm_int(&b, 0),
.src_type = nir_type_float32,
.io_semantics.num_slots = 1,
.io_semantics.location = VARYING_SLOT_VAR0);
}
if (num_layers > 1) {
nir_store_output(&b, nir_load_instance_id(&b), nir_imm_int(&b, 0),
.src_type = nir_type_float32,
.io_semantics.num_slots = 1,
.io_semantics.location = VARYING_SLOT_LAYER);
}