Commit graph

27608 commits

Author SHA1 Message Date
Eric Anholt
2792d118f1 vc4: Fix check for tile RCL blits with mismatched y.
This was a typo in 3a508a0d94 that didn't
show up in testcases at that moment.
2015-12-08 09:49:51 -08:00
Eric Anholt
1529f138ff vc4: Fix compiler warning from size_t change.
I missed this when bringing over the kernel changes.
2015-12-08 09:49:50 -08:00
Nicolai Hähnle
d5a5dbd71f radeonsi: last_gfx_fence is a winsys fence
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-12-07 21:15:59 -05:00
Ilia Mirkin
f97f755192 nvc0/ir: fix up mul+add -> mad algebraic opt, enable for integers
For some reason this has been disabled for integers ever since codegen
was merged, despite there being emission code for IMAD. Seems to work.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-12-07 18:49:28 -05:00
Ilia Mirkin
1d708aacb7 gk110/ir: fix imad sat/hi flag emission for immediate args
According to nvdisasm both the immediate and non-imm cases use the same
bits. Both of these flags are quite rarely set though.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2015-12-07 18:49:28 -05:00
Ilia Mirkin
63b850403c gk104/ir: sampler doesn't matter for txf
We actually leave the sampler unset for OP_TXF, which caused the GK104+
logic to treat some texel fetches as indirect. While this works, it's
incredibly wasteful. This only happened when the texture was > 0 (since
sampler remained == 0).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2015-12-07 16:22:54 -05:00
Marek Olšák
32f05fadbb radeonsi: disable DCC on Stoney
Cc: 11.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-07 22:01:08 +01:00
Sonny Jiang
2618886600 winsys/amdgpu: addrlib - port a Fiji bug fix
Fiji: Fixed tiled resource failures

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

v2: fix a compile failure (typo) - Marek
2015-12-07 21:58:42 +01:00
Sonny Jiang
338d7bf053 winsys/amdgpu: addrlib - port Checks mip 0 for czDispCompatible
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-07 21:58:42 +01:00
Sonny Jiang
676bc25140 winsys/amdgpu: addrlib - port fix error for workaround for 1D tiling
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-07 21:58:42 +01:00
Christian König
a2c5200a4b st/va: disable MPEG4 by default v2
The workarounds are too hacky to enable them by default
and otherwise MPEG4 doesn't work reliably.

v2: add docs/envvars.html, CC stable and fix typos

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> (v1)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> (v1)
Cc: "11.1.0" <mesa-stable@lists.freedesktop.org>
2015-12-07 20:34:17 +01:00
Christian König
ca3e2b76c0 st/va: move HEVC functions into separate file v2
v2: actually copy all of it

Signed-off-by: Christian König <christian.koenig@amd.com>
2015-12-07 20:34:17 +01:00
Ilia Mirkin
db072d2086 gk110/ir: fix imul hi emission with limm arg
The elemental demo hits this case.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2015-12-07 13:30:17 -05:00
Brian Paul
32a6e081c3 svga: use the debug callback to report issues to the state tracker
Use the new debug callback hook to report conformance, performance
and fallbacks to the state tracker.  The state tracker, in turn can
report this issues to the user via the GL_ARB_debug_output extension.

More issues can be reported in the future; this is just a start.

v2: remove conditionals around pipe_debug_message() calls since the
check is now done in the macro itself.
v3: remove unneeded dummy %s substitutions

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>,
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-12-07 08:57:49 -07:00
Brian Paul
5effc3ae74 gallium/util: check callback pointers for non-null in pipe_debug_message()
So the callers don't have to do it.

v2: also check cb!=NULL in the macro

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-12-07 08:56:51 -07:00
Dave Airlie
41e82f4f96 r600: apply SIMD workaround to cayman also.
At last on ARUBA this is required to stop tessellation hanging
in heaven.

This removes one of the SIMDs from use by the HS/LS.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 18:57:34 +10:00
Dave Airlie
6bf6bdbc2b r600: fix regression introduced with ring emit changes.
This was adding one after a CUT which broke end primitive
2015-12-07 05:44:55 +00:00
Dave Airlie
fc276bda22 r600: remove stale tessellation comment
pointed out by Marek.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 11:04:48 +10:00
Dave Airlie
33404f1415 r600: enable tessellation for evergreen/cayman (v2)
This enables tessellation for evergreen/cayman,

This will need changes before committing depending
on what hw works etc.
working are CAYMAN/REDWOOD/BARTS/TURKS/SUMO/CAICOS

v2: only enable on evergreen and above.
2015-12-07 09:59:02 +10:00
Dave Airlie
a2885d9cf9 r600g: reduce number of ps thread on caicos
this allows tess apps to start

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:02 +10:00
Dave Airlie
fe64a0c8bf r600g: adjust ls/hs thread counts for sumo
these stop tess hangs here.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:02 +10:00
Dave Airlie
e7ce9e3bb8 r600/asm: enable nstack check for tess ctrl/eval shaders.
This just makes sure they register at least one stack
usage frame like vertex shaders.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:02 +10:00
Dave Airlie
bb44c1f036 r600/asm: handle lds read operations.
Reads from the queue shouldn't be merged for now read operations.

Reads from the queue shouldn't be merged for now, or put in
T slots.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:02 +10:00
Dave Airlie
8ec2cb13e5 r600/asm: add LDS ops and barrier to the once per group restriction.
LDS ops must be scheduled in X slot, and barrier should be on its
own in a group.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:02 +10:00
Dave Airlie
18871ac576 r600: move VGT_VTX_CNT_EN into shader stages atom.
This should be enabled for tessellation shaders as well.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:02 +10:00
Dave Airlie
958d617d98 r600: enable tcs/tes dumping for R600_DUMP_SHADERS.
Trivial patch just to enable dumping more.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
b8df7d03c8 r600: handle SIMD allocation issue with HS/LS
At least one SIMD must be kept away from the HS/LS
stages in order to avoid a hw issue on evergreen/cayman.

This patch implements this workaround.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
7b5878ee04 r600/shader: increase number of inputs/outputs to 64.
Tessellation exceeds these sometimes, so increase them for now.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Edward O'Callaghan
22058f69fb r600: handle barrier opcode.
This handles the barrier opcode for EG/CM.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
9662a43d23 r600/shader: handle tess related system-values.
This adds handling for TESSINNER/TESSOUTER in the TES
where they need to be fetched from LDS,
and TESSCOORD which comes in via r0.

It also handle primitive ID and invocation ID.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
92fbf856f4 r600/shader: allow multi-dimension arrays for tcs/tes inputs/outputs.
This just allows multi-dim arrays to be processed.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
30d56d1c00 r600/shader: handle TES exports and streamout
when tessellation is enabled the TES shader is responsible
for handling streamout and exports.

This adds the streamout and export workarounds to TES,
and also makes sure TES sets up spi_sid.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
2239f3eaff r600/shader: emit tessellation factors to GDS at end of TCS.
When we are finished the shader, we read back all the tess factors
from LDS and write them to special global memory storage using
GDS instructions.

This also handles adding NOP when GDS or ENDLOOP end the TCS.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
cfc2818e23 r600/shader: handle TCS output writing.
TCS outputs whenever they are written in the shader,
need to be written to LDS not temporaries, this handles
this case. It also fixes up the case where the output
is a relative addressed output, so we don't try to apply
the relative address at the wrong time.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
892cc65fa3 r600/shader: handle VS shader writing to the LDS outputs. (v1.1)
This writes the VS shaders outputs to the LDS memory in
the correct places.

v1.1: use 24-bit
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
8b2024196f r600/shader: handle fetching tcs/tes inputs and tcs outputs
This handles the logic for doing fetches from LDS for
TCS and TES. For TCS we need to fetch both inputs and outputs,
for TES only inputs need to be fetched.

v2: use 24-bit ops.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
4477be2404 r600/shader: add get_lds_offset0 helper
This retrievs the offset into the LDS for a patch or
non-patch variable, it takes the RelPatch channel
and a temporary register.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
2a9639e41f r600/shader: add function to get tess constants info
This function retrieves the tess input/output info
from the tess constant buffer that is bound to the shader.

This uses a vfetch to get the values into the shader.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
0696ebc899 r600/shader: add utility functions to do single slot arithmatic
These utilities are to be used to do things like integer adds and
multiplies to be used in calculating the LDS offsets etc.

It handles CAYMAN MULLO differences as well.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
09d25a9b37 r600/eg: workaround bug with tess shader and dynamic GPRs.
When using tessellation on eg/ni chipsets, we must disable
dynamic GPRs to workaround a hw bug where the GPU hangs
when too many things get queued.

This implements something like the r600 code to emit
the transition between static and dynamic GPRs, and to
statically allocate GPRs when tessellation is enabled.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
d87f54f225 r600/shader: move get_temp and last_instruction helpers up
These are required for tess to be used earlier.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:01 +10:00
Dave Airlie
7933ba4d9c r600: bind geometry shader ring to the correct place
When tess/gs are enabled, the geom shader ring needs
to bind to the tess eval not the vertex shader.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
e3ecc28e99 r600: create fixed function tess control shader fallback.
If we have no tess control shader, then we have to use a fallback
one that just writes the tessellation factors.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
731ff3766f r600: create LDS info constants buffer and write LDS registers. (v2)
This creates a constant buffer with the information about
the layout of the LDS memory that is given to the vertex, tess
control and tess evaluation shaders.

This also programs the LDS size and the LS_HS_CONFIG registers,
on evergreen only.

v2: calculate lds hs num waves properly (Marek)
Emit the state only when something has changed (airlied).

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
38b5ee4796 r600/eg: update shader stage emission/tf param for tess.
This update the setting of the shader stages register
when tess is enabled and add the setting of the VGT_TF_PARAM
register from the tess shader properties.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
8874725c84 r600: hook TES/TCS shaders to the selection logic.
This hooks the TES/TCS bindings to the HW stages up.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
79d88afd5c r600: workout bitmask for the used tcs inputs/outputs.
This is used later to setup the constants to be given
to the tessellation shaders.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
839dae0dc0 r600: port over the get_lds_unique_index from radeonsi
On r600 this needs to subtract 9 due to texcoord interactions.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
420afe06d1 r600: add set_tess_state callback.
This just stores the values in the context to be used later
when emitting the constant buffers.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00
Dave Airlie
7db24b740c r600/eg: init tess registers to defaults (v1.1)
This initialises the tess min/max using fglrx values,
and also initialises a number of other registers related
to tessellation.

v1.1: caicos doesn't have some registers.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-07 09:59:00 +10:00