Commit graph

31042 commits

Author SHA1 Message Date
Rob Herring
2a2dabe1c3 Android: remove needless conditional including of child makefiles
It is not necessary to filter driver and winsys directories based on the
list of enabled drivers. Selecting the included driver libraries or not is
sufficient to control what is built.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-11 13:52:21 +01:00
Rob Herring
88014bc023 Android: Fix swrast only build
A build of only swrast is broken as the Android EGL now depends on
libdrm as does GBM. While we could make EGL conditionally depend on
libdrm, we probably want to enable kms_dri winsys as well and that will
need libdrm enabled. So just always enable libdrm and simplify the
Android makefiles a bit.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
[Emil Velikov: drop related inline comment]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-11 13:52:21 +01:00
Rob Herring
1082501979 Android: amd: use exported include dirs instead of explicit includes
Add exported include paths rather than explicitly adding the includes
in each user of the common AMD libs.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-11 13:52:21 +01:00
Rob Herring
4eec1cfa8e Android: remove remaining explicit libcxx includes
Explicitly including libcxx includes is not necessary at least on
Android M and later. It appears that libc++ was made the default in
commit "Make libc++ the default STL." in Android build system post L.
However, if L support is still needed, using "LOCAL_CXX_STL=libc++" is
the preferred way.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-11 13:52:20 +01:00
Mauro Rossi
7e907d8f7f Android: drop static linking of R600 LLVM libraries
Inspired by Chih-Wei Huang and Zhen Wu similar patches

Linking against llvm with both static and shared may be avoided,
provided that libLLVM shared library for device supports
whole static R600/AMDGPU libraries, necessary for radeonsi/amdgpu.

Complementary changes, limited to android external/llvm project
are necessary to correclty build libLLVM

Tested with marshmallow-x86 and nougat-x86 builds

Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-11 13:52:20 +01:00
Michel Dänzer
0c67aa8456 gallivm: Fix build against LLVM SVN >= r302589
deregisterEHFrames doesn't take any parameters anymore.

Reviewed-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-11 11:00:42 +09:00
Marek Olšák
740ef228f7 radeonsi: remove upload code for zero-stride vertex attribs
st/mesa takes care of it now.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
70dcb7377d gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX
The next patch will use it. This is really for svga and GL2-level drivers.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
330d0607ed gallium: remove pipe_index_buffer and set_index_buffer
pipe_draw_info::indexed is replaced with index_size. index_size == 0 means
non-indexed.

Instead of pipe_index_buffer::offset, pipe_draw_info::start is used.
For indexed indirect draws, pipe_draw_info::start is added to the indirect
start. This is the only case when "start" affects indirect draws.

pipe_draw_info::index is a union. Use either index::resource or
index::user depending on the value of pipe_draw_info::has_user_indices.

v2: fixes for nine, svga
2017-05-10 19:00:16 +02:00
Marek Olšák
22f6624ed3 gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytes
For faster initialization of non-indirect draws.
2017-05-10 19:00:16 +02:00
Marek Olšák
c24c3b94ed gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytes 2017-05-10 19:00:16 +02:00
Samuel Pitoiset
169888b55e radeonsi: silent a compiler warning
This fixes:

si_shader.c: In function ‘si_shader_dump_stats’:
si_shader.c:6704:31: warning: passing argument 1 of ‘si_get_max_workgroup_size’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
     si_get_max_workgroup_size(shader);
                               ^~~~~~
si_shader.c:5832:17: note: expected ‘struct si_shader *’ but argument is of type ‘const struct si_shader *’
 static unsigned si_get_max_workgroup_size(struct si_shader *shader)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 14:02:17 +02:00
Nicolai Hähnle
362f8f6798 radeonsi: dump compute descriptor lists
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:53 +02:00
Nicolai Hähnle
30267256df radeonsi: dump both enabled and required descriptor slots
This allows a meaningful dump with info == NULL (for compute shaders).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:50 +02:00
Nicolai Hähnle
571597bf47 radeonsi: dump compute shader as part of debug dump
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:48 +02:00
Nicolai Hähnle
fbb2886634 radeonsi: move struct si_compute into a header
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:46 +02:00
Nicolai Hähnle
1a3bedd4b7 radeonsi: split descriptor list dumping
Prepare for dumping CS descriptor list.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:44 +02:00
Nicolai Hähnle
83f56e531d radeonsi: split shader dumping
Prepare for dumping compute shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:41 +02:00
Nicolai Hähnle
0282214c72 radeonsi: more const qualifiers in shader dump functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:39 +02:00
Nicolai Hähnle
db3559da12 ddebug: implement dd_dump_launch_grid
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:37 +02:00
Nicolai Hähnle
bf4ecfec4b ddebug: extract dd_dump_shader
Will be re-used for compute shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:34 +02:00
Nicolai Hähnle
fa1519d0c9 gallium/util: dump tokens in util_dump_shader_state only if type is TGSI
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:32 +02:00
Nicolai Hähnle
bcc37711cd gallium/util: add util_dump_grid_info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:23 +02:00
Jason Ekstrand
b86dba8a0e nir: Embed the shader_info in the nir_shader again
Commit e1af20f18a changed the shader_info
from being embedded into being just a pointer.  The idea was that
sharing the shader_info between NIR and GLSL would be easier if it were
a pointer pointing to the same shader_info struct.  This, however, has
caused a few problems:

 1) There are many things which generate NIR without GLSL.  This means
    we have to support both NIR shaders which come from GLSL and ones
    that don't and need to have an info elsewhere.

 2) The solution to (1) raises all sorts of ownership issues which have
    to be resolved with ralloc_parent checks.

 3) Ever since 00620782c9, we've been
    using nir_gather_info to fill out the final shader_info.  Thanks to
    cloning and the above ownership issues, the nir_shader::info may not
    point back to the gl_shader anymore and so we have to do a copy of
    the shader_info from NIR back to GLSL anyway.

All of these issues go away if we just embed the shader_info in the
nir_shader.  There's a little downside of having to copy it back after
calling nir_gather_info but, as explained above, we have to do that
anyway.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-09 15:07:47 -07:00
Rob Herring
db6f38cb6a freedreno: fix clang error in fd_get_compute_param
With commit 10c17f23b7 ("freedreno: core compute state support"),
Android builds fail with the following error:

external/mesa3d/src/gallium/drivers/freedreno/freedreno_screen.c:610:17: error: format string is not a string literal (potentially insecure) [-Werror,-Wformat-security]
                        sprintf(ret, ir);
                                     ^~

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-09 14:20:54 -04:00
George Kyriazis
909f72e0a2 swr: fix polygonmode for front==back
Rasterizer core only supports polygonmode front==back.  Add logic for
populating fillMode for the rasterizer only for that case correctly.
Provide enum conversion between mesa enums and core enums.

The core renders lines/points as tris. Previously, code would enable
stipple for polygonmode != FILL.  Modify stipple enable logic so that
this works correctly.

No regressions in vtk tests.
Fixes the following piglit tests:
	pointsprite
	gl-1.0-edgeflag-const

v2: remove cc stable, and remove "not implemented" assert
v3: modified commit message

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-08 21:28:53 -05:00
George Kyriazis
26a9ed6f0f swr/rast: support polygonmode point
Add support for polygonmode point in the binner.  This is done by
splitting BinPostSetupPoints from BinPoints, so the earlier call can be
called from BinTriangles.  Setup has already been done at the time
BinPostSetupPoints needs to be called.

This checkin just adds support in the rasterizer.  A separate checkin
will add the appropriate driver support.

v2: remove cc stable
v3: modified commit message and subject line

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-08 21:28:53 -05:00
Timothy Arceri
34c5e58a68 util: move ALWAYS_INLINE macro to util/macro.h
Also added clang check.

macro.h is include by p_compiler.h so no other change is needed.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-09 11:21:03 +10:00
Bruce Cherniak
f52e63069a swr: move msaa resolve to generalized StoreTile
v3: list piglit tests fixed by this patch. Fixed typo Tim pointed out.
v2: Reword commit message to more closely adhere to community
guidelines.

This patch moves msaa resolve down into core/StoreTiles where the
surface format conversion routines are available.  The previous
"experimental" resolve was limited to 8-bit unsigned render targets.

This fixes a number of piglit msaa tests by adding resolve support for
all the render target formats we support.

Specifically:
layered-rendering/gl-layer-render: fail->pass
layered-rendering/gl-layer-render-storage: fail->pass
multisample-formats *[2,4,8,16] gl_arb_texture_rg: crash->pass
multisample-formats *[2,4,8,16] gl_ext_texture_snorm: crash->pass
multisample-formats *[2,4,8,16] gl_arb_texture_float: fail->pass
multisample-formats *[2,4,8,16] gl_arb_texture_rg-float: fail->pass

MSAA is still disabled by default, but can be enabled with
"export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options)
The default is 0, which is disabled.

This patch improves the number of multisample-formats supported by swr,
and fixes several crashes currently in the 17.1 branch.  Therefore, it
should be considered for inclusion in the 17.1 stable release.  Being
disabled by default, it poses no risk to most users of swr.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
cc: mesa-stable@lists.freedesktop.org
2017-05-08 14:45:40 -05:00
Marek Olšák
25d246f454 radeonsi: rename si_eliminate_const_vs_outputs -> si_optimize_vs_outputs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-08 19:18:29 +02:00
Nicolai Hähnle
cb2ac69628 radeonsi: split per-patch from per-vertex indices
Make it a bit clearer that the index spaces are logically seperate by
having them defined in different functions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-08 17:42:17 +02:00
Nicolai Hähnle
707df19451 radeonsi: clarify documentation of existing SI workaround
Limiting LS-HS to a single wave is required on all SI chips due to an
issue with a power management feature.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-08 17:42:17 +02:00
Nicolai Hähnle
f16b755863 radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-08 17:42:17 +02:00
Nicolai Hähnle
b84b631c63 radeonsi: load patch_id for TES-as-ES when exporting for PS
For some reason, this change is only necessary on SI.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-08 17:42:17 +02:00
Nicolai Hähnle
0549ea15ec radeonsi: fix primitive ID in fragment shader when using tessellation
In a VS->TCS->TES->PS pipeline, the primitive ID is read from TES exports,
so it is as if TES were using the primitive ID.

Specifically, this fixes a bug where the primitive ID is not reset at
the start of a new instance.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-08 17:42:17 +02:00
Nicolai Hähnle
854ed47f3e radeonsi: mark fast-cleared textures as compressed when dirtying
There are a bunch of piglit fast clear tests that regressed on SI, for
example ./bin/ext_framebuffer_multisample-fast-clear single-sample.

The problem is that a texture is bound as a framebuffer, cleared, and
then rendered from in a loop that loops through different clear colors.
The texture is never rebound during all this, so the change to
tex->dirty_level_mask during fast clear was not taken into account
when checking for compressed textures.

I have considered simply reverting the problematic commit. However,
I think this solution is better. It does require looping through all
bound textures after a fast clear, but the alternative would require
visiting more textures needless on every draw. Draws are much more
common than clears.

Note that the rendering feedback loop rules do not apply here, because
the framebuffer binding is changed between the glClear and the draw
that samples from the texture that was cleared.

Fixes: bdd6449769 ("radeonsi: don't mark non-dirty textures with CMASK as compressed")
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-08 17:42:16 +02:00
Pierre Moreau
27ad060c6e nv50/ir: Replace NV50_PROGRAM_IR_* by PIPE_SHADER_IR_*
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-05-07 10:26:37 -04:00
Pierre Moreau
8fe5949b08 nv50/ir: Remove unused translation methods
This code was merged commented out, and has stayed that way ever since.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-05-07 10:26:36 -04:00
Pierre Moreau
dd7ab4dcb4 nv50/ir: Free target if we failed to create a program
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-05-07 10:26:36 -04:00
Pierre Moreau
b490ca9a38 nv50/ir: Fail if encountering unknown shader type
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-05-07 10:26:36 -04:00
Marek Olšák
314657dc11 Revert "radeonsi: constify a bunch of the perfcounter structs."
This reverts commit 7088b655e8.

It breaks performance counters. If you use them with this commit, they hang
the machine hard. Sysrq and ssh don't work.
2017-05-06 21:17:52 +02:00
Marek Olšák
b0d01bd303 Revert "radeonsi: fix build with GCC 4.8"
This reverts commit 485ece83ac.

It's needed to revert 7088b655e8.
2017-05-06 21:17:52 +02:00
Rob Clark
6050d5bf3d freedreno/a3xx: fix hang w/ large render targets and small gmem
Possibly other gen's have a similar limit.  Fixes glmark2 -b shadow
with larger resolutions on devices with small gmem (for example,
fullscreen 1080p on 8x16/db410c).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-06 14:16:33 -04:00
Rob Clark
4fadfbf176 freedreno/ir3: add macro to declare variable length arrays
We have enough of these, that we should stop open coding this.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-06 14:15:42 -04:00
Marek Olšák
ee5908396e radeonsi: apply the tess+GS hang workaround to Polaris12 as well
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-05 18:55:03 +02:00
Samuel Pitoiset
485ece83ac radeonsi: fix build with GCC 4.8
Fixes: 7088b655e8 ("radeonsi: constify a bunch of the perfcounter structs.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100937
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-05 18:29:30 +02:00
Marek Olšák
69e6eab653 winsys/amdgpu: fix Polaris12 (RX 550) breakage
reported by Greg White.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100892
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
2017-05-05 01:21:32 +02:00
Marek Olšák
194d9b27cc radeonsi/gfx9: allow the scratch buffer in HS and GS
It works now.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-05 00:23:44 +02:00
Marek Olšák
8ac4923a67 radeonsi: prevent race conditions when doing scratch patching
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-05 00:23:44 +02:00
Marek Olšák
9dfc030b48 radeonsi: separate scratch state patching code into its own function
Picked from a different branch. When we stop using the scratch patching,
this function will not be called.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-05 00:23:44 +02:00