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Author SHA1 Message Date
Marek Olšák
f583f6e717 nir: use nir_build_frag_coord everywhere 
nir_build_frag_coord generates the correct sysval loads based on NIR
options. nir_load_frag_coord shouldn't be used directly because drivers
don't have to support it.

v2: RADV can't use it because nir->options isn't set, so use load_pixel_coord.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41227>
 2026-05-03 13:03:01 +00:00
Marek Olšák
ac33f82d54 ac/nir/lower_tex_coords: move input loads instead of cloning them 
This stops leaving dead input loads behind.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41173>
 2026-05-01 02:37:16 +00:00
Marek Olšák
ad4eaaae68 ac/nir: factor out ac_nir_lower_tex_coords from ac_nir_lower_image_tex 
This just separates tex coord lowering into a new pass.

The gfx_level parameter is now unused in ac_nir_lower_image_tex, but I'm
keeping it because it will be used in the future.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41173>
 2026-05-01 02:37:16 +00:00
Samuel Pitoiset
a4668733e5 ac/nir: add a pass to fixup SMEM loads with NULL PRT pages 
Only global/SSBO SMEM loads are considered because for UBOs the "LOW"
VA will be set in descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38698>
 2026-04-30 09:29:43 +00:00
Samuel Pitoiset
df3de4acbb ac,radv,radeonsi: replace mesh_fast_launch_2 by gfx_level checks 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41204>
 2026-04-28 06:50:43 +00:00
Timothy Arceri
a42c55da46 amd/radeonsi: dont clamp packed user varyings 
ac_nir_optimize_outputs() might pack user varyings into the color
built-ins. If this happens we skip adding clamping to the
components that contain the user varying.

This change also fixes a second bug where a color built-in can be
packed into a non-color slot and was no longer being clamped.

Fixes: 3777a5d7 ("radeonsi: assign param export indices before compilation")
Closes: #14443

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40594>
 2026-04-27 22:59:58 +00:00
Marek Olšák
0684976de8 ac/nir: add ac_nir_assign_fs_input_locations to set PS input locations in stone
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No intended functional change.

This prevents possible breakage due to DCE removing input loads followed
by nir_shader_gather_info updating input masks and changing the result of
ac_nir_get_io_driver_location after PS input register contents are already
determined.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41175>
 2026-04-27 21:05:53 +00:00
Marek Olšák
bfb6c41b64 amd: remove unnecessary and transitive #includes
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Reported by clang tools.
See: https://clangd.llvm.org/guides/include-cleaner

struct ac_cmdbuf had to be moved to ac_cmdbuf_base.h because we can't
include ac_cmdbuf.h->sid.h->amdgfxregs.h in radeon_winsys.h for r300.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41091>
 2026-04-24 21:53:07 +00:00
Rhys Perry
91d555c2cb radv: lower indirect derefs after linking 
Scratch access isn't very optimizable, so more stores are optimized away
if we lower indirect derefs after both linking and radv_optimize_nir.

fossil-db (navi21):
Totals from 1264 (0.62% of 202427) affected shaders:
Instrs: 1504703 -> 1504708 (+0.00%); split: -0.02%, +0.02%
CodeSize: 8031388 -> 8031020 (-0.00%); split: -0.02%, +0.02%
SpillSGPRs: 1865 -> 1869 (+0.21%)
Latency: 12106362 -> 12106464 (+0.00%); split: -0.01%, +0.01%
InvThroughput: 4056269 -> 4056044 (-0.01%); split: -0.01%, +0.00%
VClause: 13927 -> 13940 (+0.09%)
SClause: 32382 -> 32396 (+0.04%); split: -0.03%, +0.08%
Copies: 188004 -> 187897 (-0.06%); split: -0.17%, +0.11%
Branches: 39045 -> 39052 (+0.02%); split: -0.01%, +0.03%
PreSGPRs: 79885 -> 79814 (-0.09%); split: -0.11%, +0.02%
VALU: 1072639 -> 1072532 (-0.01%); split: -0.01%, +0.00%
SALU: 187317 -> 187375 (+0.03%); split: -0.11%, +0.14%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31265>
 2026-04-24 11:01:03 +00:00
Ganesh Belgur Ramachandra
5ea995893b amd: add initial common code for gfx11.7 
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40866>
 2026-04-18 18:54:23 +00:00
Rhys Perry
c10aa0f7b2 radv/gfx11.7: enable float8 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40917>
 2026-04-17 11:33:02 +00:00
Rhys Perry
7b1a1fcf5e ac: add gfx11.7 enums 
This is just enough to compile future patches and run tests.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40917>
 2026-04-17 11:32:55 +00:00
Marek Olšák
99546f7bad ac/nir: add ac_nir_get_io_driver_location as replacement for IO bases 
Acked-by: Pierre-Eric
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40556>
 2026-04-15 18:12:07 +00:00
Rhys Perry
7f3900ed20 ac/nir_lower_global_access: perform range analysis if useful 
fossil-db (navi31):
Totals from 1197 (0.59% of 202426) affected shaders:
Instrs: 2117283 -> 2108380 (-0.42%); split: -0.47%, +0.05%
CodeSize: 11183776 -> 11140060 (-0.39%); split: -0.42%, +0.03%
Latency: 13568247 -> 13648044 (+0.59%); split: -0.13%, +0.72%
InvThroughput: 2389746 -> 2376716 (-0.55%); split: -0.63%, +0.09%
VClause: 43337 -> 43138 (-0.46%); split: -0.51%, +0.05%
SClause: 31035 -> 31027 (-0.03%); split: -0.22%, +0.20%
Copies: 227528 -> 227002 (-0.23%); split: -0.59%, +0.36%
Branches: 29393 -> 29392 (-0.00%); split: -0.01%, +0.00%
PreSGPRs: 64238 -> 64336 (+0.15%)
PreVGPRs: 70480 -> 70468 (-0.02%)
VALU: 1387439 -> 1379274 (-0.59%); split: -0.59%, +0.00%
SALU: 185514 -> 185382 (-0.07%); split: -0.56%, +0.49%
VOPD: 4425 -> 4400 (-0.56%); split: +0.66%, -1.22%

fossil-db (navi21):
Totals from 1197 (0.59% of 202427) affected shaders:
Instrs: 1987004 -> 1974920 (-0.61%); split: -0.64%, +0.03%
CodeSize: 10803928 -> 10745204 (-0.54%); split: -0.56%, +0.01%
VGPRs: 83848 -> 83856 (+0.01%); split: -0.01%, +0.02%
SpillSGPRs: 9843 -> 9861 (+0.18%)
Latency: 14518481 -> 14534898 (+0.11%); split: -0.17%, +0.29%
InvThroughput: 3712336 -> 3698081 (-0.38%); split: -0.52%, +0.13%
VClause: 52677 -> 52546 (-0.25%); split: -0.51%, +0.27%
SClause: 31113 -> 31050 (-0.20%); split: -0.37%, +0.17%
Copies: 219723 -> 218017 (-0.78%); split: -1.05%, +0.27%
Branches: 33717 -> 33716 (-0.00%); split: -0.01%, +0.00%
PreSGPRs: 66364 -> 66480 (+0.17%)
PreVGPRs: 71048 -> 71036 (-0.02%)
VALU: 1442585 -> 1431331 (-0.78%); split: -0.78%, +0.00%
SALU: 209617 -> 208517 (-0.52%); split: -0.88%, +0.35%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40945>
 2026-04-15 15:13:10 +00:00
Raviraj Uppal
c5423d3e27 ac/nir: Fixed OpenGL CTS transform feedback overflow detection test case
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The ordered atomic commits the post-add offset to memory, but overflow was computed using the pre-add offset, causing partial overflows to be missed and counters to become corrupted.

Fixes: "KHR-GL46.transform_feedback_overflow_query_ARB.multiple-streams-one-buffer-per-stream" based on the postwrite buffer offset, rather than the offset before the current workgroups writes.
Reviewed-by: Marek Olsak <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40745>
 2026-04-10 15:43:21 +00:00
Samuel Pitoiset
71b6db06e1 ac/nir: add descriptor heap support to opt_flip_if_for_mem_loads()
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40702>
 2026-04-07 06:15:24 +00:00
Samuel Pitoiset
1184610de4 ac/nir: add descriptor heap support to ac_nir_lower_image_tex() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40702>
 2026-04-07 06:15:24 +00:00
Samuel Pitoiset
d2132ae011 ac/nir: adjust lowering of query size for descriptor heap 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40702>
 2026-04-07 06:15:24 +00:00
Karol Herbst
b7ca34db13 nir: unvendor ac_nir_lower_sin_cos 
So we can use it for Nvidia.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40541>
 2026-03-31 01:47:31 +02:00
Karol Herbst
5bb3c9f69c nir: rename fsin_amd and fcos_amd to a more generic name 
Nvidia implements both the same way as AMD does, so it makes sense to
allow for code sharing here.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40541>
 2026-03-31 01:47:29 +02:00
Georg Lehmann
5d2be211ea nir: add fp_math_ctrl to ddx/ddy 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40630>
 2026-03-26 13:15:49 +00:00
Marek Olšák
dfbadedc02 ac/nir/meta_cs_blit: use uint16 for coordinates to fix 64K blits
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Reviewed-by: Pierre-Eric
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40565>
 2026-03-25 09:39:20 +00:00
Marek Olšák
2283244975 nir: change export_amd intrinsics to use target instead of base 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40415>
 2026-03-23 06:10:49 +00:00
Marek Olšák
b75a3112fd nir: change export_amd intrinsics to use enabled_channels instead of write_mask 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40415>
 2026-03-23 06:10:49 +00:00
Daniel Schürmann
d909e14f30 ac: add and lower loop continue construct for streamout buffer info loop 
We are going to disallow continue statements without
loop continue constructs.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39942>
 2026-03-21 07:42:55 +00:00
Georg Lehmann
ec331cc48a nir: replace lower_ldexp with has_ldexp 
I can be bothered to fix all the backends that don't set lower_ldexp,
and only two backends have ldexp anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33900>
 2026-03-20 08:15:08 +00:00
Georg Lehmann
87081a73c9 ac/nir/cull: make fisfinite nan/inf preserving 
Otherwise, it's meaningless.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40291>
 2026-03-13 07:13:09 +00:00
Georg Lehmann
a25f00eaed nir: merge xfb and xfb2 into one 64bit intrinsic index 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40299>
 2026-03-10 07:46:22 +00:00
Rhys Perry
b4dc39f632 ac/nir: fix when both dual source outputs are unwritten 
When this is the case. we shouldn't hang or crash.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40005>
 2026-03-05 09:38:23 +00:00
Marek Olšák
fd6941650c ac: add ac_cu_info::has_fmask, adjust FMASK checks 
Some of these should check has_fmask, others should check < GFX11.

v2: move to ac_cu_info

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
 2026-03-04 21:14:56 +00:00
Rhys Perry
5c3b5688a1 amd: rename ac_cu_info to ac_compiler_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
 2026-03-03 08:50:12 +00:00
Rhys Perry
ab4b3b7737 ac/nir/ngg: add ac_cu_info shortcut 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
 2026-03-03 08:50:12 +00:00
Rhys Perry
a65089dfce ac/nir: pass ac_cu_info to ac_nir_compute_tess_wg_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
 2026-03-03 08:50:11 +00:00
Rhys Perry
8801ca188d ac/nir: don't pass radeon_info to ac_nir_set_options 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
 2026-03-03 08:50:10 +00:00
Rhys Perry
5a8a7dbb22 ac/nir: don't pass radeon_info to NGG lowering 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
 2026-03-03 08:50:09 +00:00
Rhys Perry
36feec61c8 ac/nir: use ac_nir_lower_ngg_options for ac_nir_lower_ngg_mesh 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
 2026-03-03 08:50:09 +00:00
Rhys Perry
2c7b8e6786 ac/gpu_info: move some NGG flags to ac_cu_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
 2026-03-03 08:50:09 +00:00
Rhys Perry
29f8237d30 amd: move various flags to ac_cu_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:14 +00:00
Rhys Perry
78b3e07bed ac/nir: remove ac_nir_lower_ps_late_options::family 
This is unused.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:12 +00:00
Rhys Perry
6d31054d86 ac/nir: remove gfx_level parameter from ac_nir_lower_indirect_derefs 
This was unused.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:12 +00:00
Samuel Pitoiset
e8710152fb ac/nir: stop passing radeon_info for addr->coord helpers 
Only for gb_addr_config.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40041>
 2026-02-26 07:21:06 +00:00
Samuel Pitoiset
2eb9420061 ac/nir: fix writemask for dual source blending on GFX11+
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This should definitely be an OR operation if MRT0 and MRT1 don't write
the same channels. This also requires to set the writemask manually
because when it's 0 (in case a dual-source output is missing), the
intrinsic computes the mask itself with the number of components.

No fossils-db changes on NAVI33.

Fixes: 45d8cd037a ("ac/nir: rewrite ac_nir_lower_ps epilog to fix dual src blending with mono PS")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14878
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39996>
 2026-02-24 20:20:02 +00:00
Priya Hosur
0bfad39f15 ac/nir/ngg: re-enable use of known compile-time GS connectivity
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38075>
 2026-02-18 01:29:37 +00:00
Marek Olšák
a2309edb6b ac/nir/meta: properly align sparse buffer clears with 12-byte clear values 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
 2026-02-17 14:47:41 +00:00
Marek Olšák
62cce3abcd ac/nir/meta: use the clear/copy compute shader if CP DMA doesn't support sparse 
ac_prepare_cs_clear_copy_buffer determines whether to use CP DMA, and
the driver obeys that.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
 2026-02-17 14:47:41 +00:00
Marek Olšák
bbcfab9f4f ac/nir/meta: don't scalarize sparse loads if the address is aligned to load size 
This should make copying sparse faster if we get aligned buffer bounds.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
 2026-02-17 14:47:41 +00:00
Rhys Perry
e4b8ade092 ac/nir,radv,radeonsi: flip branches to avoid waitcnts 
fossil-db (navi31):
Totals from 5123 (6.42% of 79825) affected shaders:
Instrs: 12712435 -> 12703672 (-0.07%); split: -0.12%, +0.05%
CodeSize: 67068852 -> 67033244 (-0.05%); split: -0.10%, +0.05%
VGPRs: 363896 -> 363956 (+0.02%)
SpillSGPRs: 5035 -> 5074 (+0.77%); split: -0.83%, +1.61%
Latency: 115048972 -> 111944013 (-2.70%); split: -2.89%, +0.19%
InvThroughput: 19102126 -> 18696069 (-2.13%); split: -2.34%, +0.22%
VClause: 258693 -> 258770 (+0.03%); split: -0.01%, +0.04%
SClause: 346271 -> 346225 (-0.01%); split: -0.02%, +0.00%
Copies: 1040815 -> 1042017 (+0.12%); split: -0.23%, +0.34%
Branches: 332467 -> 332565 (+0.03%); split: -0.04%, +0.07%
PreSGPRs: 304888 -> 304699 (-0.06%); split: -0.10%, +0.04%
PreVGPRs: 296652 -> 296654 (+0.00%)
VALU: 7591803 -> 7594601 (+0.04%); split: -0.01%, +0.05%
SALU: 1454420 -> 1455764 (+0.09%); split: -0.24%, +0.33%
VOPD: 1826 -> 1810 (-0.88%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38262>
 2026-02-16 19:39:43 +00:00
Marek Olšák
a9df891bc6 nir: allow get_ssbo_size to return a 64-bit result 
to match get_ubo_size, and to support HW where SSBOs can have a 64-bit size.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39743>
 2026-02-16 12:59:36 +00:00
Marek Olšák
d1e6a5c1c8 ac: lower load_num_workgroups in NIR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
 2026-02-13 15:33:19 +00:00
Marek Olšák
1e11e83d1c ac/nir: add ac_nir_lower_intrinsics_to_args_options structure 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
 2026-02-13 15:33:19 +00:00