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ac/nir: don't pass radeon_info to ac_nir_set_options

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
This commit is contained in:
Rhys Perry 2026-02-23 10:37:07 +00:00 • committed by Marge Bot
parent 5a8a7dbb22
commit 8801ca188d
6 changed files with 17 additions and 14 deletions
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18
src/amd/common/nir/ac_nir.c
View file

@ -11,7 +11,7 @@
#include "nir_intrinsics.h"
/* Set NIR options shared by ACO, LLVM, RADV, and radeonsi. */
void ac_nir_set_options(struct radeon_info *info, bool use_llvm,
void ac_nir_set_options(const struct ac_cu_info *info, bool use_llvm,
nir_shader_compiler_options *options)
{
/* |---------------------------------- Performance & Availability --------------------------------|
@ -73,13 +73,13 @@ void ac_nir_set_options(struct radeon_info *info, bool use_llvm,
options->has_ford_funord = true;
options->has_fsub = true;
options->has_isub = true;
options->has_sdot_4x8 = info->cu_info.has_accelerated_dot_product;
options->has_sudot_4x8 = info->cu_info.has_accelerated_dot_product && info->gfx_level >= GFX11;
options->has_udot_4x8 = info->cu_info.has_accelerated_dot_product;
options->has_sdot_4x8_sat = info->cu_info.has_accelerated_dot_product;
options->has_sudot_4x8_sat = info->cu_info.has_accelerated_dot_product && info->gfx_level >= GFX11;
options->has_udot_4x8_sat = info->cu_info.has_accelerated_dot_product;
options->has_dot_2x16 = info->cu_info.has_accelerated_dot_product && info->gfx_level < GFX11;
options->has_sdot_4x8 = info->has_accelerated_dot_product;
options->has_sudot_4x8 = info->has_accelerated_dot_product && info->gfx_level >= GFX11;
options->has_udot_4x8 = info->has_accelerated_dot_product;
options->has_sdot_4x8_sat = info->has_accelerated_dot_product;
options->has_sudot_4x8_sat = info->has_accelerated_dot_product && info->gfx_level >= GFX11;
options->has_udot_4x8_sat = info->has_accelerated_dot_product;
options->has_dot_2x16 = info->has_accelerated_dot_product && info->gfx_level < GFX11;
options->has_bfdot2_bfadd = info->gfx_level >= GFX12;
options->has_find_msb_rev = true;
options->has_pack_32_4x8 = true;
@ -103,7 +103,7 @@ void ac_nir_set_options(struct radeon_info *info, bool use_llvm,
options->optimize_quad_vote_to_reduce = !use_llvm;
options->lower_fisnormal = true;
options->support_16bit_alu = info->gfx_level >= GFX8;
options->vectorize_vec2_16bit = info->cu_info.has_packed_math_16bit;
options->vectorize_vec2_16bit = info->has_packed_math_16bit;
options->discard_is_demote = true;
options->optimize_sample_mask_in = true;
options->optimize_load_front_face_fsign = true;

4
src/amd/common/nir/ac_nir.h
View file

@ -61,8 +61,10 @@ typedef struct nir_xfb_info nir_xfb_info;
/* Executed by ac_nir_cull when the current primitive is accepted. */
typedef void (*ac_nir_cull_accepted)(nir_builder *b, void *state);
struct ac_cu_info;
void
ac_nir_set_options(struct radeon_info *info, bool use_llvm,
ac_nir_set_options(const struct ac_cu_info *info, bool use_llvm,
nir_shader_compiler_options *options);
nir_def *

3
src/amd/common/nir/tests/ac_nir_lower_mem_access_test.cpp
View file

@ -221,11 +221,12 @@ static void run_subtest(subtest *st, bool print = false)
struct radeon_info info = {};
info.gfx_level = st->gfx_level;
info.cu_info.gfx_level = info.gfx_level;
info.cu_info.has_packed_math_16bit = true;
info.cu_info.has_accelerated_dot_product = true;
nir_shader_compiler_options options = {};
ac_nir_set_options(&info, st->use_llvm, &options);
ac_nir_set_options(&info.cu_info, st->use_llvm, &options);
create_shader(&state, &options);

2
src/amd/compiler/tests/helpers.cpp
View file

@ -176,7 +176,7 @@ setup_nir_cs(enum amd_gfx_level gfx_level, mesa_shader_stage stage, enum radeon_
ac_fill_cu_info(&rad_info, NULL);
memset(&nir_options, 0, sizeof(nir_options));
ac_nir_set_options(&rad_info, false, &nir_options);
ac_nir_set_options(&rad_info.cu_info, false, &nir_options);
glsl_type_singleton_init_or_ref();

2
src/amd/vulkan/radv_shader.c
View file

@ -58,7 +58,7 @@ get_nir_options_for_stage(struct radv_physical_device *pdev, mesa_shader_stage s
nir_shader_compiler_options *options = &pdev->nir_options[stage];
const bool split_fma = (stage <= MESA_SHADER_GEOMETRY || stage == MESA_SHADER_MESH) && pdev->cache_key.split_fma;
ac_nir_set_options(&pdev->info, pdev->use_llvm, options);
ac_nir_set_options(&pdev->info.cu_info, pdev->use_llvm, options);
options->lower_ffma16 = split_fma || pdev->info.gfx_level < GFX9;
options->lower_ffma32 = split_fma || pdev->info.gfx_level < GFX10_3;

2
src/gallium/drivers/radeonsi/si_get.c
View file

@ -826,7 +826,7 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
bool has_16bit_io = sscreen->info.gfx_level >= GFX9;
nir_shader_compiler_options *options = sscreen->nir_options;
ac_nir_set_options(&sscreen->info, !sscreen->use_aco, options);
ac_nir_set_options(&sscreen->info.cu_info, !sscreen->use_aco, options);
options->lower_ffma16 = sscreen->info.gfx_level < GFX9;
options->lower_ffma32 = !use_fma32;