Commit graph

946 commits

Author SHA1 Message Date
Tapani Pälli
2254eaa3ae anv: add current_pipeline for batch_emit_pipe_control
This way we can implemented workarounds depending on the pipeline.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25671>
2023-10-26 11:51:47 +00:00
Nanley Chery
9e402e93d2 anv: Delete implicit CCS code
Stop allocating CCS at the end of some BOs. Anv no longer uses that
memory range.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Nanley Chery
ee6e2bc4a3 anv: Place images into the aux-map when safe to do so
At image bind time, if an image's addresses can be placed into the
aux-map without causing conflicts with a pre-existing mapping, do so.
The code aux management code in the binding function operates on a
per-plane basis. So, use the per-plane CCS memory range from the image
rather than the CCS memory region for the entire BO.

Another way to avoid aux-map conflicts is to rely solely on having a
dedicated allocation for an image. Unfortunately, not all workloads
change their behavior when drivers report a preference for dedicated
allocations. In particular, 3DMark Wild Life Extreme does not make more
dedicated allocations and such a solution was measured to perform ~16%
worse than this solution. With this solution, I did not measure a loss
of CCS on that benchmark.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6304
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Nanley Chery
d31c62f384 anv: Wrap aux surface image binding queries
Add and use anv_image_get_aux_memory_range.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Lionel Landwerlin
53a4738eb1 anv: track render targets & render area changes separately
The following instructions :
   - 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
   - 3DSTATE_VIEWPORT_STATE_POINTERS_CC
   - 3DSTATE_SCISSOR_STATE_POINTERS

do not care about the content/format/count of the render targets, only
the size of the render area and count of viewport/scissor.

By tracking render targets & render area we can reduce the emission of
those instructions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25778>
2023-10-18 13:43:51 +03:00
Rohan Garg
b94b784492 anv: fix debug string for PC flush
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: fc5cb54 ('anv: Add debug messages for DEBUG_PIPE_CONTROL')
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25690>
2023-10-17 14:31:16 +00:00
Hyunjun Ko
960441d5a3 anv: don't flush_llc on gen9
Fixes: 3d993e63bb ("anv: Enable barrier handling on video engines ")
Closes: mesa/mesa#9988

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25762>
2023-10-17 12:28:06 +02:00
Chia-I Wu
7a4903626b anv: support alternative push descriptor sets
Do not assume anv_cmd_pipeline_state::push_descriptor is the currently
bound push descriptor set.  With this and anv_push_descriptor_set_init,
it is possible to initialize a temporary push descriptor set on stack
for internal use.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:40 +00:00
Chia-I Wu
d5841dce60 anv: support image views with surface state stream
Add optional anv_state_stream to anv_image_view_init.  This is useful
for internal image views whose lifetimes are tied to the lifetime of a
command buffer.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:40 +00:00
Lionel Landwerlin
ebb68d506d anv: simplify push descriptors
There can only be one push descriptor amongst all descriptor sets.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25598>
2023-10-11 20:45:03 +00:00
Rohan Garg
8688a3b8f7 anv: ensure that FCV_CCS_E fast clears are properly tracked
Surfaces with FCV_CCS_E aux usage should be marked as fast cleared when
being rendered to, to ensure proper fast clear state tracking. We also
need to ensure that we're not trying to partially resolve surfaces with
level > 0 and layer > 0 since we don't track fast clear states for
those.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25589>
2023-10-11 12:18:15 +00:00
Lionel Landwerlin
29352b304b anv: add support for VK_EXT_nested_command_buffer
Our implementation of secondary command buffers already jumps into
them and edits the end of the secondary command buffer to jump back
into the primary.

That implementation can work just the same with any levels of
secondary. The only possible issue would happen with a secondary
calling itself, but that's not possible.

We also cannot support simultaneous execution with self-modifying
command buffers. That's actually not a problem at the moment because
we don't have multiple queues of the same family but we choose to
reflect that in the feature bits.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25600>
2023-10-11 11:32:47 +00:00
Lionel Landwerlin
8a12286214 anv: rename primary in container in ExecuteCommands()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25600>
2023-10-11 11:32:47 +00:00
Vinson Lee
16fa4621b8 anv: Fix transfer type assert
Fix defect reported by Coverity Scan.

Constant expression result (CONSTANT_EXPRESSION_RESULT)
always_true_or: The or condition
type != ANV_TIMESTAMP_CAPTURE_AT_CS_STALL || type != ANV_TIMESTAMP_REWRITE_COMPUTE_WALKER
will always be true because type cannot be equal to two different values
at the same time, so it must be not equal to at least one of them.

Fixes: 5112b42146 ("anv: Handle end of pipe with MI_FLUSH_DW on transfer queue")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25605>
2023-10-08 22:39:41 -07:00
Lionel Landwerlin
596b438936 intel/ds: track acceleration RT commands
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25570>
2023-10-06 11:10:12 +00:00
Kenneth Graunke
17b8b2cffd anv: Add support for a transfer queue on Alchemist
Alchemist has an improved blitter that's sufficiently powerful to
implement a transfer queue. Tigerlake's blitter lacks compression
handling and other features we need, unfortunately.

Rework (Sagar):
- Check blitter command buffer in EndCommandBuffer

v2: (Lionel)
- Look at image, buffer and memory barriers as well
- Flush cache if there is queue ownership transfer

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18325>
2023-10-03 18:02:52 +00:00
Sagar Ghuge
5112b42146 anv: Handle end of pipe with MI_FLUSH_DW on transfer queue
Blitter command streamer supports MI_FLUSH_DW command so make sure we
don't end up emitting pipe control with CS stall and also handle the end
of pipe timestamp with MI_FLUSH_DW command.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18325>
2023-10-03 18:02:52 +00:00
Tapani Pälli
99d3d76646 anv: HDC flush is available only for GFX_VER 12+
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25399>
2023-10-02 12:05:53 +00:00
Sagar Ghuge
3d993e63bb anv: Enable barrier handling on video engines
v1: (Lionel)
- Don't check for the layout transition

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9776

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25131>
2023-09-28 18:22:37 +00:00
Paulo Zanoni
6368c1445f anv/sparse: add the initial code for Sparse Resources
This giant patch implements a huge chunk of the Vulkan Sparse
Resources API. I previously had this as a nice series of many smaller
patches that evolved as the xe.ko added more features, but once I was
asked to squash some of the major reworks I realized I wouldn't be
able easily rewrite history, so I just squased basically the whole
series into a giant patch. I may end up splitting this again later if
I find a way to properly do it.

If we want to support the DX12 API through vkd3d we need to support
part of the the Sparse Resources API. If we don't, a bunch of Steam
games won't work.

For now we only support the xe.ko backend, but the vast majority of
the code is KMD-independent and so an i915.ko implementation would use
most of what's here, just extending the part that binds and unbinds
memory.

v2+: There's no way to sanely track the version history of this patch
in this commit message. Please refer to Gitlab.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23045>
2023-09-28 06:16:40 +00:00
Lionel Landwerlin
7d30b1e28f intel/ds: track number of tracepoint timestamp copies
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>
2023-09-25 13:05:45 +00:00
Tapani Pälli
8d2dcd55d7 anv: refactor to fix pipe control debugging
While earlier changes to pipe control emission allowed debug dump of
each pipe control, they also changed debug output to almost always print
same reason/function for each pc. These changes fix the output so that
we print the original function name where pc is emitted.

As example:

pc: emit PC=( +depth_flush +rt_flush +pb_stall +depth_stall ) reason: gfx11_batch_emit_pipe_control_write
pc: emit PC=( ) reason: gfx11_batch_emit_pipe_control_write

changes back to:

pc: emit PC=( +depth_flush +rt_flush +pb_stall +depth_stall ) reason: gfx11_emit_apply_pipe_flushes
pc: emit PC=( ) reason: cmd_buffer_emit_depth_stencil

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25282>
2023-09-20 06:04:37 +00:00
Lionel Landwerlin
eb0c197090 anv: bound image usages to the associated queue family
When applying barriers for image transitions, we're currently
considering all possible usages of an image. But when running on a
compute only queue for example, the usage of an image will never be
one of those :
   - VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_TRANSIENT_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR

Removing unused usages for the compute queue allows us to reduce the
scope of the VK_IMAGE_LAYOUT_GENERAL for example. This a bunch of
transition operation that are completely useless when dealing with
barriers on the compute queue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25092>
2023-09-08 18:05:08 +00:00
Lionel Landwerlin
80a352c87c anv: remove aux checking asserts
Zink is running into those asserts on CI. The problem is that with non
auxilary modifiers like I915_FORMAT_MOD_Y_TILED, we might still
allocate larger buffers with IMPLICIT_CCS.

This isn't a complete fix, the real fix with come with
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003 where
we stop overallocating and those assert will match the private binding
allocation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 569f80f2df ("anv: Reduce accesses of isl_mod_info->aux_usage")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25099>
2023-09-08 16:57:53 +00:00
Lionel Landwerlin
6f4fe3f81b anv: Copy/Clear MSAA images over companion RCS while we are on compute
When we have MSAA copy/clear operation on the compute queue, use the
companion RCS command buffer to carry out copy/clear operations.

v2: (Sagar)
- Flush cache according to command buffer
- Invalidate AUX when we create new companion RCS command buffer if
  platform support AUX TT.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
9866c4e32b anv: Skip layout transition on the compute queue
v2: (Nanley)
- Make sure we skip layout transition during queue ownership transfer

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
46d203c0ab anv: Add secondary companion RCS cmd buffer to primary
Add secondary buffer's companion RCS command buffer to primary buffer's
companion RCS command buffer for execution if secondary RCS is valid.

v2: (Lionel)
- Fix the primary companion RCS check
- Set batch error

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
13b3d7f741 anv: Handle companion RCS in end/destory/reset code path
If we have valid companion RCS command buffer, we should
end/destroy/reset in the same fashion as of main command buffer.

v2:
- Add lock around anv_cmd_buffer_destroy (Sagar)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
801523f03d anv: Split out End/Destroy/Reset cmd buffer code into helper
Since we are going to have companion RCS command buffer, we need to
end/destroy/reset companion RCS command buffer similar to main (CCS/BCS)
command buffer.

It's better to split out common code into helper function so that we can
use it later in this series.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:05 +00:00
Lionel Landwerlin
50f6903bd9 anv: add new low level emission & dirty state tracking
A single Vulkan state can map to multiple fields in different GPU
instructions. This change introduces the bottom half of a simplified
emission mechanism where we do the following :
          Vulkan runtime state
                   |
                   V
        Intermediate driver state
                   |
                   V
         Instruction programming

This way we can detect that the intermediate state didn't change and
avoid HW instruction emission.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
44656f98d5 anv: split pipeline programming into instructions
The goal of this change it to move away from a single batch buffer
containing all kind of pipeline instructions to a list of instructions
we can emit separately.

We will later implement pipeline diffing and finer state tracking that
will allow fewer instructions to be emitted.

This changes the following things :

   * instead of having a batch & partially packed instructions, move
     everything into the batch

   * add a set of pointer in the batch that allows us to point to each
     instruction (almost... we group some like URB instructions,
     etc...).

At pipeline emission time, we just go through all of those pointers
and emit the instruction into the batch. No additional packing is
involved.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
758540d741 anv: add a flag tracking occlusion query count change
We'll use this later to know when to reemit
3DSTATE_STREAMOUT::ForceRendering

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
19c3f3ede4 anv: categorize partial/final pipeline instruction
The old gfx8 field doesn't apply anymore.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
a1f7e7d93e anv: move all dynamic state emission to cmd_buffer_flush_dynamic_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Lionel Landwerlin
1fdc089e9c anv: change anv_batch_emit_merge to also do packing
Instead of having that function do only merging of 2 sets of dwords,
it can also do the packing of the new dynamic values. This saves us a
bunch of local structures to declare and calling the packing functions
ourselves.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Rohan Garg
86e8ba4d32 anv: use the lineage number for WA
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d0669f3ede ("intel/dev: switch defect identifiers to use lineage numbers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
2023-09-03 03:04:26 +00:00
Rohan Garg
cbc4916661 anv: drop dead ifdef
The GFX_VERX10 macro doesn't exist and we no longer use
SCRATCH_SURFACE_STATE_POOL_SIZE.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b3f6e5dc70 ('anv: remove incorrect ifdef')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
2023-09-03 03:04:26 +00:00
Nanley Chery
144c2d4e4a anv: Initialize the clear color more often for FCV
Instead of only initializing the clear color when the first subresource
is accessed, initialize it for every FCV-enabled subresource. This is
needed because writes to any subresource may be converted to fast
clears.

Now that init_fast_clear_color is called for every subresource, we take
care not to stomp on the fast-clear-tracking state of the first
subresource by moving the code which updates it outside of
init_fast_clear_color.

Now init_fast_clear_color does just what it says: initializes the fast
clear color.

This fixes the regression introduced with commit 57445adc89,
("anv: Re-enable CCS_E on TGL+").

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8461
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24857>
2023-09-01 16:34:22 +00:00
Rohan Garg
51bee677b3 anv: use the pre defined _3DPRIMITIVE_DIRECT macro
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24978>
2023-09-01 08:07:54 +00:00
Lionel Landwerlin
5c2aca456e anv: implement vkCmdBindIndexBuffer2KHR
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24387>
2023-08-31 16:02:52 +03:00
Sviatoslav Peleshko
9865e5dff4 anv: Do fast clear color initialization more delicately
Fixes: b4198e79 ("anv/cmd_buffer: Initalize the clear color struct for CNL+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9464
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24768>
2023-08-23 12:55:08 +00:00
Tapani Pälli
c9abcddad4 anv: implement a dummy depth flush for Wa_14016712196
Emit depth flush after state that sends implicit depth flush. These
states are:

 3DSTATE_HIER_DEPTH_BUFFER
 3DSTATE_STENCIL_BUFFER
 3DSTATE_DEPTH_BUFFER
 3DSTATE_CPSIZE_CONTROL_BUFFER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
2023-08-22 12:49:37 +00:00
Tapani Pälli
71a2d651c1 anv: refactor batch_set_preemption to use batch_emit_pipe_control
This makes it easier to hook workarounds for this pipe control.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24690>
2023-08-17 16:07:59 +00:00
Lionel Landwerlin
cf5ee0a0f7 anv: emit 3DSTATE_GS only once per pipeline
Following 71ebd9b9d7, 3DSTATE_GS can be emitted as part of the
pipeline batch and as a dynamic state. Just do the latter.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 71ebd9b9d7 ("anv,hasvk: respect provoking vertex setting on geometry shaders")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24632>
2023-08-12 13:49:31 +00:00
Tapani Pälli
92941ee84b anv: implement required PSS sync for Wa_18019816803
According to WA description, we need to track DS write state
and emit a PSS_STALL_SYNC whenever that state changes.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>
2023-08-11 07:15:48 +00:00
Lionel Landwerlin
9934613c74 anv/hasvk: track robustness per pipeline stage
And split them into UBO and SSBO

v2 (Lionel):
 - Get rid of robustness fields in anv_shader_bin
v3 (Lionel):
 - Do not pass unused parameters around

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
2023-08-09 09:00:12 +03:00
Sagar Ghuge
49eabb9ea6 anv: Add GPU breakpoint before/after specific draw call
This change allow us to insert the MI_SEMAPHORE_WAIT before/after
specific draw call. With GTX tool, we can always update the memory
address to unblock spinning wait.

v2:
- Make sure draw_call_count is thread-safe (Lionel)
- Add static inline helper (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24308>
2023-08-08 17:36:19 +00:00
José Roberto de Souza
d9d284d050 anv: Remove VkAllocationCallbacks parameter from reloc functions
Mismatch allocator could cause bad things, so better set the allocator
on anv_reloc_list_init() and use it in every reloc function.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24411>
2023-08-01 22:30:04 +00:00
José Roberto de Souza
a7ab31b96a anv: Set MI_MATH MOCS field
MOCS = 0 is a invalid MOCS index, so it is necessary get a valid value
and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
2023-08-01 19:49:45 +00:00
Rohan Garg
7f6e6eb8ec anv: partially revert 2e8b1f6d
set_image_compressed_bit checks for the image aux usage whereas
cmd_buffer_mark_image_written checks for the subresource's aux usage.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: 2e8b1f6d ('anv: drop duplicate checks when setting the compressed bit')
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24363>
2023-07-31 15:06:39 +00:00