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anv: implement required PSS sync for Wa_18019816803

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According to WA description, we need to track DS write state
and emit a PSS_STALL_SYNC whenever that state changes.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>
This commit is contained in:
Tapani Pälli 2023-07-31 13:44:05 +03:00 • committed by Marge Bot
parent 419531c5d9
commit 92941ee84b
4 changed files with 26 additions and 0 deletions
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5
src/intel/vulkan/anv_private.h
View file

@ -2838,6 +2838,11 @@ struct anv_cmd_graphics_state {
bool object_preemption;
bool has_uint_rt;
/**
* DEPTH and STENCIL attachment write state for Wa_18019816803.
*/
bool ds_write_state;
uint32_t n_occlusion_queries;
};

9
src/intel/vulkan/genX_blorp_exec.c
View file

@ -294,6 +294,15 @@ blorp_exec_on_render(struct blorp_batch *batch,
}
#endif
/* Check if blorp ds state matches ours. */
if (intel_needs_workaround(cmd_buffer->device->info, 18019816803)) {
bool blorp_ds_state = params->depth.enabled || params->stencil.enabled;
if (cmd_buffer->state.gfx.ds_write_state != blorp_ds_state) {
batch->flags |= BLORP_BATCH_NEED_PSS_STALL_SYNC;
cmd_buffer->state.gfx.ds_write_state = blorp_ds_state;
}
}
if (params->depth.enabled &&
!(batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL))
genX(cmd_buffer_emit_gfx12_depth_wa)(cmd_buffer, &params->depth.surf);

1
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -4101,6 +4101,7 @@ genX(CmdExecuteCommands)(
primary->state.current_l3_config = NULL;
primary->state.current_hash_scale = 0;
primary->state.gfx.push_constant_stages = 0;
primary->state.gfx.ds_write_state = false;
vk_dynamic_graphics_state_dirty_all(&primary->vk.dynamic_graphics_state);
/* Each of the secondary command buffers will use its own state base

11
src/intel/vulkan/gfx8_cmd_buffer.c
View file

@ -651,6 +651,17 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
ds.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[opt_ds.stencil.back.op.compare];
}
#if INTEL_NEEDS_WA_18019816803
if (intel_needs_workaround(cmd_buffer->device->info, 18019816803)) {
bool ds_write_state = opt_ds.depth.write_enable || opt_ds.stencil.write_enable;
if (cmd_buffer->state.gfx.ds_write_state != ds_write_state) {
genX(batch_emit_pipe_control)(&cmd_buffer->batch, cmd_buffer->device->info,
ANV_PIPE_PSS_STALL_SYNC_BIT);
cmd_buffer->state.gfx.ds_write_state = ds_write_state;
}
}
#endif
const bool pma = want_stencil_pma_fix(cmd_buffer, &opt_ds);
genX(cmd_buffer_enable_pma_fix)(cmd_buffer, pma);
}