Commit graph

2160 commits

Author SHA1 Message Date
Lionel Landwerlin
9a058f6b4c radv: use 1ull for alignment computations
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21757>
2023-03-08 23:32:37 +00:00
Samuel Pitoiset
31d699106d ac/surface: add RADEON_SURF_VRS_RATE for selecting swizzle mode on GFX11
On GFX11, VRS rate images can't use linear tiling and the swizzle mode
must be either SW_Z or SW_R.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20333>
2023-03-08 10:30:48 +00:00
Timur Kristóf
fb819fdb13 ac/nir: clear nir_var_shader_out from TCS barriers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
2023-03-08 07:29:09 +00:00
Timur Kristóf
1a7b5979df ac: Add pending_vmem field to args.
This is to indicate when an argument was loaded from VMEM
and needs a waitcnt before it can be used.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21696>
2023-03-08 04:39:18 +00:00
SureshGuttula
30a89323ad radeonsi: Add support for DPB resize
This patch will add support for dpb resize when low to high resolution
change/ svc use-cases.

With DPB tier1 type,vp9 svc decoder use cases are failed. This
Change will fix this[VCN1/VCN2].

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21548>
2023-03-08 02:19:58 +00:00
Marek Olšák
f7076d129d amd: add nir_intrinsic_xfb_counter_sub_amd and fix overflowed streamout offsets
Fixes: 5ec79f9899 - ac/nir/ngg: nogs support streamout

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21584>
2023-03-07 22:08:47 +00:00
Yogesh Mohan Marimuthu
347a5b79f9 ac/surface: only adjust pitch if surf_pitch was modified
Modifying pitch for all LINEAR surface isn't correct;
the original change that modified surf_pitch was only
intended for YUV textures.

This fixes vkGetImageSubresourceLayout rowPitch return value
for VK_FORMAT_BC3_UNORM_BLOCK + VK_IMAGE_TILING_LINEAR.

Fixes: fcc499d5 (ac/surface: adjust gfx9.pitch[*] based on surf->blk_w)

v2: add check for UYVY format (Pierre-Eric)
v3: move blk_w division to above if check (Pierre-Eric)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21595>
2023-03-07 13:50:31 +00:00
Marek Olšák
09005e6dfc ac/nir: add ac_nir_lower_subdword_loads to lower 8/16-bit loads to 32 bits
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19399>
2023-03-03 03:27:40 +00:00
Marek Olšák
0669d7c29b radeonsi: remove Smart Access Memory because CPU access has large overhead
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8176

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
2023-03-03 00:41:49 +00:00
Marek Olšák
3c9aa3e201 amd/rtld: allow 64K LDS for all shader stages except for gfx6
Gfx6 can only use 32K LDS per workgroup.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
2023-03-03 00:41:48 +00:00
Marek Olšák
ccaaf8fe04 amd: massively simplify how info->spi_cu_en is applied
Instead of having ac_set_reg_cu_en that sets the register, replace it with
ac_apply_cu_en that only returns the modified register value,
which allows a large simplification in both drivers because a lot of code
becomes duplicated after it's switched to ac_apply_cu_en.

RADV also didn't apply it to a few registers. Fixed.

This removes 82 lines of code in total.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
2023-03-03 00:41:48 +00:00
Marek Olšák
2b3f551ed8 ac/nir: don't use load_esgs_vertex_stride_amd on gfx6-8
An improvement for 9f1e6d8f70.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
2023-03-03 00:41:48 +00:00
Marek Olšák
79732416fd amd: query cache sizes from the kernel
Also rename l1_cache_size -> tcp_cache_size. L1 means shader array cache.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
2023-03-03 00:41:48 +00:00
Marek Olšák
6e2e89e6d8 amd,radeonsi: change enabled_rb_mask to 64 bits
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
2023-03-03 00:41:48 +00:00
Marek Olšák
03ffb8d77c amd: update amdgpu_drm.h
From kernel commit 817714d9665e.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
2023-03-03 00:41:48 +00:00
Samuel Pitoiset
f19fccd9f8 amd,ac/rgp: fix SQTT memory types
This crashed on Steam Deck because the memory type is LPDDR5 and it
wasn't not handled in the switch. It seems the kernel changed the
memory type returned for VanGogh because it used to work.

Fixes: aef7ea868f ("ac/gpu_info: handle LPDDR4 and 5 in ac_memory_ops_per_clock")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21627>
2023-03-02 07:54:35 +00:00
Marek Olšák
9f1e6d8f70 nir,amd: add and use nir_intrinsic_load_esgs_vertex_stride_amd
This will emulate VGT_ESGS_RING_ITEMSIZE, which does the multiplication
for us. It's beneficial to stop setting VGT_ESGS_RING_ITEMSIZE to reduce
context rolls, and also the register will be removed in the future.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
2023-02-24 21:27:24 +00:00
Marek Olšák
5e837f9594 amd/gpu_info: add a workaround for SI_FORCE_FAMILY=gfx1100
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
2023-02-24 21:27:24 +00:00
Marek Olšák
df6380ddc9 amd: implement conformant TRUNC_COORD behavior for gfx11
For testing, the conformant behavior can be enabled by setting
conformant_trunc_coord to true manually and running this to enable
the conformant behavior in hw:
    umr -w *.*.regTA_CNTL2 0x40000

The layer index rounding and TRUNC_COORD resetting workarounds can disabled
in the shader compiler.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
2023-02-24 21:27:24 +00:00
Marek Olšák
80c0efa50f amd: query the per-SIMD VGPR counts from the kernel, don't hardcode them
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
2023-02-24 21:27:24 +00:00
Marek Olšák
34c01cf718 amd: bump AMD_MAX_SE and change the CU mask type to 16 bits
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
2023-02-24 21:27:23 +00:00
Samuel Pitoiset
e82c11df66 ac/nir: add resinfo lowering for sliced storage 3D views
The first layer isn't necessarily 0 and depth shouldn't be minified.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359>
2023-02-24 14:12:22 +00:00
Timur Kristóf
881c52ba19 ac: Port ACO's get_fetch_format to ac_get_safe_fetch_size.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21358>
2023-02-16 15:29:36 +00:00
Pierre-Eric Pelloux-Prayer
affa8a9fb2 amd/surface: fix base_mip_width of subsampled formats
base_mip_width is used in si_compute_copy_image when the
SI_IMAGE_ACCESS_BLOCK_FORMAT_AS_UINT flag is used.

   width = tex->surface.u.gfx9.base_mip_width;

This will be incorrect if we don't adjust it. For instance,
with a 260x256 image, surf_pitch and base_mip_width are
320 before surf_pitch is updated to be 192.

Both need to match, or computing the width from base_mip_width
leads to incorrect result.

Cc: mesa-stable

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21253>
2023-02-16 00:25:17 -05:00
Dave Airlie
30b6e9797d ac: add name to codec info struct
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>
2023-02-07 12:47:43 +10:00
Rhys Perry
24618721d3 ac: move ring_offsets to ac_shader_args
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19202>
2023-02-06 14:25:15 +00:00
Marek Olšák
fb5d31c3dd amd/surface: clean up is_dcc_supported_by_L2
no functional change, though this removes "<=" for navi10, which was
never true in the "<" case

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:45 -05:00
Marek Olšák
4f246f27b1 amd: define new SET_*_REG_PAIRS packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:45 -05:00
Timur Kristóf
3a819bd22e ac/nir/ngg: Include culled primitives in query.
Vulkan spec 18.8. Primitives Generated Queries:

When a generated primitive query for a vertex stream is active,
the primitives-generated count is incremented every time a
primitive emitted to that stream reaches the transform feedback
stage, whether or not transform feedback is active.

We can see the order of stages in chapter 27 Fixed-Function
Vertex Post-Processing, which shows that the transform feedback
stage is before rasterization (and therefore culling).

Conclusion is that culled primitives should be included
in the primitives generated query.

This commit makes sure to emit the primitives generated query
code before culling and uses the input primitive count passed
to the current wave instead of the exec mask after culling.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21037>
2023-02-04 11:53:07 +01:00
Qiang Yu
aea109e25d ac/nir/ngg,radv: ms use ac_nir_export_(primitive|position|parameter)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
80d928c20e ac/nir/ngg: gs use ac_nir_export_(position|parameter)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
bae5a3157f ac/nir/ngg: prepare gather_vs_outputs to be used by gs
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
80506be31b ac/nir/ngg,radv,radeonsi: nogs use ac_nir_export_(position|parameter)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
f084e9bbe8 ac/nir/ngg: change clipdist_neg_mask_var type to uint32
ACO does not support 8bit ALU ops.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
d798214c7b ac/nir/ngg: fix clip dist culling mask uninitialized
Fixes: f75452918b ("ac/nir/ngg: support clipdist culling")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
7c41cdb81f ac/nir,radv,radeonsi: gs copy shader use ac_nir_export_(position|parameter)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
7308637bb4 ac/nir,radv,radeonsi: legacy vs use ac_nir_export_(position|parameter)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:44 +00:00
Qiang Yu
58988c3239 ac/nir: add force_vrs to ac_nir_export_position
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:43 +00:00
Qiang Yu
daa12b1ab1 ac/nir: add ac_nir_export_parameter
For last VGT stage to export parameter outputs.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:43 +00:00
Qiang Yu
f823581dd4 ac/nir: add ac_nir_export_position
Used by last VGT stage to export position related outputs.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:43 +00:00
Qiang Yu
e9268b2c06 ac/nir: gs and nogs use ac_nir_export_primitive
Mesh shader primitive export is left unchanged because it needs
extra changes for per primitive output export when export
primitive.

Mesh shader will use second channel of primitive export.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:43 +00:00
Qiang Yu
5fe4dd3d68 ac/llvm: implement nir_export_amd
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
2023-02-03 12:27:43 +00:00
Timur Kristóf
9af3a31744 ac/nir/cull: Alway remove zero-area triangles in face culling.
The face culling algorithm should have been disabled for
conservative overestimation because it already
(mistakenly) removed some close-to-zero area triangles.

Now that the driver disables it in that case,
let's always remove zero-area triangles.
This only costs +2 SALU instructions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20987>
2023-02-03 09:39:54 +00:00
Marek Olšák
76472c850b amd: fix typo in shadowed uconfig registers on gfx11
It used an invalid offset, which hung.

Fixes: f24f8665db - ac: implement register shadowing for gfx11

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:02 +00:00
Marek Olšák
35fa57dfae amd: sort and re-indent packet definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:02 +00:00
Marek Olšák
8d9e18974f amd: update late_alloc_wave64 for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:02 +00:00
Marek Olšák
76e3437c1e amd: update the cache size for gfx1103_r1
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:02 +00:00
Marek Olšák
2cdb6be86c amd: change pbb_max_alloc_count for gfx11
based on PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:02 +00:00
Marek Olšák
bfc37e7c63 amd: unify and tune the attribute ring size for gfx11
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:02 +00:00
Marek Olšák
711c4bddb2 radeonsi/gfx11: use new packet EVENT_WRITE_ZPASS
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:01 +00:00