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Author SHA1 Message Date
Konstantin Seurer
1bcb7f1eb8 docs: Document lavapipe ray tracing features 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:26 +00:00
Konstantin Seurer
b55580cab8 lavapipe/ci: Document ray query failures 
This is the same issue as RADV+emulate_rt has. (Except the jit timeout
of course)

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:26 +00:00
Konstantin Seurer
c2646c6bbc lavapipe: Advertise VK_KHR_ray_query 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:26 +00:00
Konstantin Seurer
32e86e1bff lavapipe: Advertise VK_KHR_acceleration_structure 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:26 +00:00
Konstantin Seurer
09bf35e3c4 lavapipe: Advertise VK_KHR_deferred_host_operations 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:26 +00:00
Konstantin Seurer
ed6c0a7443 lavapipe: Implement VK_KHR_ray_query 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:26 +00:00
Konstantin Seurer
b69ae8b355 lavapipe: Add ray traversal code 
Basically the software implementation in radv_rt_common without
traversal stack.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:26 +00:00
Konstantin Seurer
897ccbd180 lavapipe: Implement VK_KHR_acceleration_structure 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:25 +00:00
Konstantin Seurer
ff09e95080 vulkan/cmd_queue: Implement CmdBuildAccelerationStructuresKHR 
This is needed for copying the arguments properly.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25616>
 2024-03-06 16:34:25 +00:00
Amber
48da361eb7 tu: wideLines support for a7xx. 
Passes dEQP-VK.clipping.clip_volume.clipped.wide_lines_*

Signed-off-by: Amber Harmonia <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27775>
 2024-03-06 16:01:09 +00:00
Rhys Perry
beb07fafba nir/search: fix nir_replace_instr() debug code 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27335>
 2024-03-06 15:23:18 +00:00
Rhys Perry
a93bd52f4f nir/lower_int64: allow 64-bit comparisons when lowering minmax 
RADV doesn't need these to be lowered.

fossil-db (navi31):
Totals from 1 (0.00% of 79242) affected shaders:
Instrs: 28 -> 26 (-7.14%)
CodeSize: 140 -> 128 (-8.57%)
Latency: 605 -> 604 (-0.17%)
Copies: 5 -> 6 (+20.00%)
VALU: 14 -> 13 (-7.14%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27335>
 2024-03-06 15:23:18 +00:00
Rhys Perry
b37804c8de nir/algebraic: optimize 64-bit comparisons with zero'd halves to 32-bit 
These expect nir_lower_int64 to replace u2u64 to pack_64_2x32_split(, 0).

fossil-db (navi31):
Totals from 149 (0.19% of 79242) affected shaders:
Instrs: 433095 -> 431830 (-0.29%); split: -0.29%, +0.00%
CodeSize: 2165980 -> 2160284 (-0.26%); split: -0.27%, +0.00%
SpillSGPRs: 689 -> 688 (-0.15%)
Latency: 3801497 -> 3799901 (-0.04%); split: -0.05%, +0.01%
InvThroughput: 1547916 -> 1546567 (-0.09%); split: -0.09%, +0.01%
VClause: 4698 -> 4693 (-0.11%)
SClause: 9981 -> 9977 (-0.04%); split: -0.05%, +0.01%
Copies: 66148 -> 65431 (-1.08%); split: -1.09%, +0.01%
PreSGPRs: 6732 -> 6729 (-0.04%)
PreVGPRs: 7976 -> 7945 (-0.39%)
VALU: 252936 -> 252336 (-0.24%)
SALU: 51794 -> 51274 (-1.00%); split: -1.03%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27335>
 2024-03-06 15:23:18 +00:00
Rhys Perry
417eb390c6 nir/algebraic: remove duplicated iand(ien, ine)/ior(ieq, ieq) patterns 
These don't seem useful, since they're already done in the early optimizations.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27335>
 2024-03-06 15:23:18 +00:00
Rhys Perry
6952bb359c nir/algebraic: don't create 64-bit min/max/ior if lowered 
fossil-db (navi31):
Totals from 58 (0.07% of 79242) affected shaders:
Instrs: 11692 -> 11304 (-3.32%)
CodeSize: 65836 -> 62412 (-5.20%)
VGPRs: 1320 -> 1344 (+1.82%)
Latency: 51712 -> 50234 (-2.86%)
InvThroughput: 10190 -> 10160 (-0.29%)
Copies: 460 -> 688 (+49.57%)
VALU: 6130 -> 5897 (-3.80%)
SALU: 1231 -> 1284 (+4.31%); split: -0.32%, +4.63%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27335>
 2024-03-06 15:23:18 +00:00
Daniel Schürmann
61854009f3 aco: rematerialize constants in every basic block during optimizer 
Totals from 16837 (21.25% of 79242) affected shaders: (GFX11)

MaxWaves: 441634 -> 444546 (+0.66%); split: +0.66%, -0.00%
Instrs: 25908303 -> 25838469 (-0.27%); split: -0.36%, +0.09%
CodeSize: 133943168 -> 135446948 (+1.12%); split: -0.04%, +1.16%
VGPRs: 985332 -> 977440 (-0.80%); split: -0.83%, +0.03%
SpillSGPRs: 9133 -> 7535 (-17.50%); split: -17.74%, +0.24%
SpillVGPRs: 1418 -> 1359 (-4.16%); split: -4.58%, +0.42%
Scratch: 5047552 -> 5040640 (-0.14%)
Latency: 204330340 -> 204179212 (-0.07%); split: -0.32%, +0.25%
InvThroughput: 36584220 -> 36508856 (-0.21%); split: -0.40%, +0.19%
VClause: 437847 -> 437344 (-0.11%); split: -0.34%, +0.22%
SClause: 771311 -> 771013 (-0.04%); split: -0.42%, +0.38%
Copies: 1774950 -> 1712070 (-3.54%); split: -4.46%, +0.91%
Branches: 580595 -> 580478 (-0.02%); split: -0.03%, +0.01%
PreSGPRs: 877017 -> 817549 (-6.78%)
PreVGPRs: 852747 -> 846966 (-0.68%); split: -0.68%, +0.00%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26875>
 2024-03-06 15:02:21 +00:00
Rohan Garg
9baa57158d intel/genxml: update PIPE_CONTROL so that we can decode it on the CCS 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28013>
 2024-03-06 14:37:11 +00:00
Rhys Perry
3b28ba8239 aco: optimize for purely linear VGPR copies 
fossil-db:
Totals from 2 (0.00% of 79242) affected shaders:
Instrs: 1344 -> 1340 (-0.30%)
CodeSize: 6968 -> 6952 (-0.23%)
Latency: 4414 -> 4410 (-0.09%)
InvThroughput: 1018 -> 1020 (+0.20%)
Copies: 60 -> 56 (-6.67%)
SALU: 40 -> 36 (-10.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:46 +00:00
Rhys Perry
8cd3a3a520 aco/tests: add tests for linear VGPR register allocation 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:46 +00:00
Rhys Perry
f9b37723d0 aco/ra: emit linear VGPR parallel copy separately 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:46 +00:00
Rhys Perry
d9b69a7cbf aco/ra: disable live range splitting of linear vgprs 
These shouldn't happen anymore.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:46 +00:00
Rhys Perry
b7738de4f9 aco/ra: rework linear VGPR allocation 
We allocate them at the end of the register file and keep them separate
from normal VGPRs. This is for two reasons:
- Because we only ever move linear VGPRs into an empty space or a space
  previously occupied by a linear one, we never have to swap a normal VGPR
  and a linear one. This simplifies copy lowering.
- As linear VGPR's live ranges only start and end on top-level blocks, we
  never have to move a linear VGPR in control flow.

fossil-db (navi31):
Totals from 5493 (6.93% of 79242) affected shaders:
MaxWaves: 150365 -> 150343 (-0.01%)
Instrs: 7974740 -> 7976073 (+0.02%); split: -0.06%, +0.08%
CodeSize: 41296024 -> 41299024 (+0.01%); split: -0.06%, +0.06%
VGPRs: 283192 -> 329560 (+16.37%)
Latency: 64267936 -> 64268414 (+0.00%); split: -0.17%, +0.17%
InvThroughput: 10954037 -> 10951735 (-0.02%); split: -0.09%, +0.07%
VClause: 132792 -> 132956 (+0.12%); split: -0.06%, +0.18%
SClause: 223854 -> 223841 (-0.01%); split: -0.01%, +0.01%
Copies: 559574 -> 561395 (+0.33%); split: -0.24%, +0.56%
Branches: 179630 -> 179636 (+0.00%); split: -0.02%, +0.02%
VALU: 4572683 -> 4574487 (+0.04%); split: -0.03%, +0.07%
SALU: 772076 -> 772111 (+0.00%); split: -0.01%, +0.01%
VOPD: 1095 -> 1099 (+0.37%); split: +0.73%, -0.37%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:46 +00:00
Rhys Perry
2d49c79c7e aco/ra: change get_reg_bounds() helper 
We will have a separate bounds for linear VGPRs.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:46 +00:00
Rhys Perry
a38bc9e165 aco/ra: move parallelcopy creation into helper 
This is almost a direct copy+paste into it's own function.

This is useful both for future work and the make the caller smaller.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:46 +00:00
Rhys Perry
a8b72082cf aco/ra: constify various RegisterFile 
This makes it more obvious that these functions don't change it.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:45 +00:00
Rhys Perry
6a195bb521 aco: only allow linear vgpr kills in top-level blocks 
This is already the case, and requiring it will be useful in the future.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:45 +00:00
Rhys Perry
07eab4ab40 aco: require linear vgpr uses to be late kill 
This also removes some linear VGPR tests which will be replaced soon
anyway.

fossil-db (navi31):
Totals from 107 (0.14% of 79242) affected shaders:
Instrs: 66203 -> 66211 (+0.01%); split: -0.09%, +0.10%
CodeSize: 354644 -> 354588 (-0.02%); split: -0.08%, +0.07%
VGPRs: 4476 -> 4452 (-0.54%); split: -0.80%, +0.27%
Latency: 513863 -> 513877 (+0.00%); split: -0.08%, +0.08%
InvThroughput: 68871 -> 68870 (-0.00%); split: -0.02%, +0.02%
SClause: 1589 -> 1590 (+0.06%)
PreVGPRs: 3404 -> 3415 (+0.32%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:45 +00:00
Rhys Perry
5e17a39b15 aco: allow p_start_linear_vgpr to use multiple operands 
Merging the p_create_vector into the p_start_linear_vgpr is useful since
we stopped attempting to place the p_start_linear_vgpr definition in the
same registers as the operand.

fossil-db (navi31):
Totals from 927 (1.17% of 79242) affected shaders:
MaxWaves: 26412 -> 26442 (+0.11%)
Instrs: 938328 -> 938181 (-0.02%); split: -0.14%, +0.13%
CodeSize: 4891448 -> 4890820 (-0.01%); split: -0.11%, +0.10%
VGPRs: 47016 -> 47004 (-0.03%); split: -0.13%, +0.10%
SpillSGPRs: 222 -> 226 (+1.80%)
Latency: 5076065 -> 5075191 (-0.02%); split: -0.12%, +0.10%
InvThroughput: 712316 -> 712421 (+0.01%); split: -0.09%, +0.10%
SClause: 27992 -> 27972 (-0.07%); split: -0.09%, +0.02%
Copies: 38042 -> 38104 (+0.16%); split: -1.95%, +2.12%
PreVGPRs: 39448 -> 39369 (-0.20%)
VALU: 570157 -> 570224 (+0.01%); split: -0.13%, +0.14%
SALU: 51672 -> 51678 (+0.01%); split: -0.01%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:45 +00:00
Rhys Perry
f764f6848a aco/ra: disable p_start_linear_vgpr allocation hint 
As this is, this will become useless soon.

fossil-db (navi31):
Totals from 176 (0.22% of 79242) affected shaders:
Instrs: 101932 -> 102413 (+0.47%); split: -0.01%, +0.49%
CodeSize: 541352 -> 543256 (+0.35%); split: -0.01%, +0.36%
VGPRs: 7884 -> 7896 (+0.15%)
Latency: 588129 -> 588559 (+0.07%); split: -0.07%, +0.15%
InvThroughput: 83349 -> 83689 (+0.41%); split: -0.01%, +0.42%
Copies: 4324 -> 4691 (+8.49%)
VALU: 61431 -> 61798 (+0.60%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:45 +00:00
Rhys Perry
f99443a68b aco: don't combine linear and normal VGPR copies 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27697>
 2024-03-06 12:55:45 +00:00
Christian Gmeiner
599de4b47c etnaviv: Remove not used etna_assemble_set_imm(..) 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27950>
 2024-03-06 12:40:02 +00:00
Jonathan Gray
2777a4c692 intel/dev: update DG2 device names 
Ref: https://ark.intel.com/content/www/us/en/ark/products/codename/226095/products-formerly-alchemist.html
Ref: DG2 PRM, Volume 4: Configurations, Steppings and Device IDs
Fixes: 99354efe31 ("intel/dev: Add DG2 G12 PCI IDs")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27944>
 2024-03-06 11:23:02 +00:00
Rohan Garg
731ffa0737 anv, blorp: Set COMPUTE_WALKER Message SIMD field 
Fixes: d95bbf35 ('anv: Set COMPUTE_WALKER Message SIMD field')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27983>
 2024-03-06 10:58:27 +00:00
Lionel Landwerlin
0de856ecef anv: fix companion command buffer initialization 
Currently the command buffer is completely empty, which is not good.
There are a few of things that should be programmed, but we've
probably been okay due to the default engine initialization.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: edcde0679c ("anv: Add helper to create companion RCS command buffer")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27979>
 2024-03-06 10:23:34 +00:00
Lionel Landwerlin
67c9f94b05 anv: delay internal shader upload to when needed 
People reported an increase in device initialization affecting some
Android tests [1].

So delay the internal shader upload (similar to what we do for blorp
shaders, and what RADV seems to be doing too) until actually needed.

[1] : https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361#note_2305129

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27946>
 2024-03-06 09:58:53 +00:00
Patrick Lerda
11ce5b1a9f r300: enable R400 cos and sin hardware vertex shader opcodes 
The R400 has working hardware opcodes for cos and sin at
the vertex shader level. This change enables these features.

This change was tested on an ATI R430 (0x554d).

Here is the shader-db summary:
total instructions in shared programs: 103863 -> 103552 (-0.30%)
instructions in affected programs: 5610 -> 5299 (-5.54%)
helped: 38
HURT: 24
total temps in shared programs: 16836 -> 16830 (-0.04%)
temps in affected programs: 42 -> 36 (-14.29%)
helped: 6
HURT: 0
total cycles in shared programs: 162448 -> 162139 (-0.19%)
cycles in affected programs: 5760 -> 5451 (-5.36%)
helped: 38
HURT: 24

LOST:   0
GAINED: 3

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10504
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27970>
 2024-03-06 09:38:27 +00:00
Eric Engestrom
158e5882e9 ci/lavapipe: fold DEQP_VER: vk and drop .deqp-test-vk 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27936>
 2024-03-06 08:54:11 +00:00
Eric Engestrom
54254ae3f2 ci/venus-lavapipe: drop unused DEQP_VER that's being overwritten by DEQP_SUITE anyway 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27936>
 2024-03-06 08:54:11 +00:00
Samuel Pitoiset
4a2a261a79 radv: stop passing radv_cmd_buffer to draw functions with task shaders 
In order to remove the ambiguity because for task shaders the driver
needs to emit to both the GFX CS and the ACE CS but all states come
from the main cmdbuf (ie. GFX) from the application point of view.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27819>
 2024-03-06 08:24:39 +00:00
Samuel Pitoiset
c2288ad43d radv: allocate a 32-bit value for the MEC fw bug with indirect mesh+task earlier 
This workaround will be removed soon but in order to pass only
radv_cmd_state+cs+ace_cs to the functions that draw with mesh+task, the
32-bit value needs to be allocated earlier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27819>
 2024-03-06 08:24:39 +00:00
Samuel Pitoiset
d18c50856a radv: refactor emitting the view index for task shaders 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27819>
 2024-03-06 08:24:39 +00:00
Samuel Pitoiset
1f8cfb2b2e radv: always use ace_cs for the gang CS variable 
For consistency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27819>
 2024-03-06 08:24:39 +00:00
qbojj
4b7f4724f8 vulkan: Fix calculation of flags in vk_graphics_pipeline_state_fill 
Fixes: 2b62d90158 ("vk/graphics_state: Support VK_KHR_maintenance5")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10705
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27929>
 2024-03-06 07:54:28 +00:00
Mark Janes
597c1c1c18 intel/dev: declare workarounds required by ATSM platforms 
INTEL_PLATFORM_ATSM_G10 requires the same workarounds as INTEL_PLATFORM_DG2_G10
INTEL_PLATFORM_ATSM_G11 requires the same workarounds as INTEL_PLATFORM_DG2_G11

Closes: #10749
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27987>
 2024-03-05 22:49:14 -08:00
Dave Airlie
ac391536eb nvk: only unmap heap bos that were mapped 
Otherwise we munmap(0, size) and remove the cts binary maps

Also add an assert, though NULL is legal for munmap in theory,
nothing should be using it in practice on Linux.

Fixes: e6f137e9ed ("nvk: Only map heaps that explicitly request maps")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28006>
 2024-03-06 15:20:25 +10:00
Faith Ekstrand
2feb3c6e30 nak: Support F2I for 8-bit integers on SM50 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28000>
 2024-03-06 03:20:10 +00:00
Faith Ekstrand
11de561395 nak/sm50: Use OpBfe instead of OpBRev for nir_op_find_lsb 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28000>
 2024-03-06 03:20:10 +00:00
Faith Ekstrand
3d13d190e6 nak/sm50: Fix encoding of immediates in OpFFma 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28000>
 2024-03-06 03:20:10 +00:00
Faith Ekstrand
21de61b1ac nak: Fix printing of OpIsberd 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28000>
 2024-03-06 03:20:10 +00:00
David Heidelberg
1316854e74 ci/intel: split asus-cx9400-volteer into acer-cp514-2h-11{30,60}g7-volteer 
Cc: mesa-stable
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27877>
 2024-03-06 01:52:49 +00:00