Commit graph

1230 commits

Author SHA1 Message Date
Qiang Yu
196569b1a4 all: rename gl_shader_stage to mesa_shader_stage
It's not only for GL, change to a generic name.

Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bgl_shader_stage\b/mesa_shader_stage/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:40 +08:00
Qiang Yu
07a3a54d37 all: rename PIPE_SHADER_TYPES to MESA_SHADER_STAGES
Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bPIPE_SHADER_TYPES\b/MESA_SHADER_STAGES/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:39 +08:00
Alyssa Rosenzweig
8b5c800d1f asahi: use NIR gathered interpolation
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36501>
2025-08-03 21:57:26 +00:00
Alyssa Rosenzweig
3e8575c037 nir,agx: pull lower_printf_buffer into backend
no other users now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36516>
2025-08-03 21:27:50 +00:00
Emma Anholt
d5826506ce nir,agx: Move AGX's loop (generalized) to shared NIR code.
When I went to use opt_reassociate for tu, I was advised that you want to
do this loop to get the best results.  If everyone needs it, let's make it
common code and explain what's going on.

In the process, also make it skip work appropriately when there's no
progress.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36342>
2025-08-03 20:58:28 +00:00
Alyssa Rosenzweig
8a8fe2ffc1 agx: handle 16-bit coordinates
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:41:11 -04:00
Alyssa Rosenzweig
0319bd0a84 agx: set register cache hints
impl cribbed from the Valhall compiler. that seems only fair, I wrote the
code either way (-:

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:54 -04:00
Alyssa Rosenzweig
35e70bf30a agx: lower export even later
so we can do reg cache opt as late as possible without losing this information.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:54 -04:00
Alyssa Rosenzweig
d9c0971e50 agx: plumb is_alu query for reg cache opt
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:54 -04:00
Alyssa Rosenzweig
a27e51f3c1 agx: fix cache bit packing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:54 -04:00
Alyssa Rosenzweig
c6111cc43c agx: fix export instructions in the IR
so we can see thru them properly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:54 -04:00
Alyssa Rosenzweig
17f2a3af7a agx: fix reg cache printing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:54 -04:00
Alyssa Rosenzweig
d15bfdf0a7 agx: track block divergence
conservative for now. we'll need this for correctness.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:54 -04:00
Alyssa Rosenzweig
fc9f3363fa agx: add foreach_reg_{src,dest}
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:53 -04:00
Alyssa Rosenzweig
562377f01d agx: try to rematerialize to improve occupancy
we already have a perfectly good spiller and SSA... use it when it helps. yes,
this costs a bit of CPU time, but it's guarded behind enough checks that the
average time should be fine.

this was prompted by a shadertoy where we were losing waves due to way too
many constants pooled at the start of a chunky shader.

in GL shader-db, only affected shaders are in blender:

   instrs HURT:   shaders/blender/1020.shader_test FS:              3125 -> 3178 (1.70%)
   instrs HURT:   shaders/blender/981.shader_test FS:               3125 -> 3178 (1.70%)
   instrs HURT:   shaders/blender/729.shader_test FS:               3086 -> 3154 (2.20%)
   instrs HURT:   shaders/blender/1023.shader_test FS:              3085 -> 3153 (2.20%)
   instrs HURT:   shaders/blender/424.shader_test FS:               3085 -> 3153 (2.20%)

   threads helped:   shaders/blender/1020.shader_test FS:              576 -> 640 (11.11%)
   threads helped:   shaders/blender/1023.shader_test FS:              576 -> 640 (11.11%)
   threads helped:   shaders/blender/424.shader_test FS:               576 -> 640 (11.11%)
   threads helped:   shaders/blender/729.shader_test FS:               576 -> 640 (11.11%)
   threads helped:   shaders/blender/981.shader_test FS:               576 -> 640 (11.11%)

in VK fossils, there's a lot more high pressure shaders that benefit:

   Totals from 113 (0.21% of 54019) affected shaders:
   MaxWaves: 64448 -> 73088 (+13.41%)
   Instrs: 388529 -> 391646 (+0.80%); split: -0.00%, +0.80%
   CodeSize: 2750064 -> 2769106 (+0.69%); split: -0.00%, +0.69%
   ALU: 292960 -> 295863 (+0.99%); split: -0.00%, +0.99%
   FSCIB: 292960 -> 295863 (+0.99%); split: -0.00%, +0.99%
   GPRs: 21297 -> 19289 (-9.43%)
   Preamble instrs: 75703 -> 75911 (+0.27%)

notable improvement in Far Cry 5.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
2025-08-03 14:40:53 -04:00
Alyssa Rosenzweig
5761213587 asahi: clang-format
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36489>
2025-08-01 15:34:24 +00:00
Alyssa Rosenzweig
bcf1a1c20b treewide: use nir_def_block
Via Coccinelle patch:

    @@
    expression definition;
    @@

    -definition->parent_instr->block
    +nir_def_block(definition)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36489>
2025-08-01 15:34:24 +00:00
Alyssa Rosenzweig
82ae8b1d33 treewide: simplify nir_def_rewrite_uses_after
Most of the time with nir_def_rewrite_uses_after, you want to rewrite after the
replacement. Make that the default thing to be more ergonomic and to drop
parent_instr uses.

We leave nir_def_rewrite_uses_after_instr defined if you really want the old
signature with an arbitrary after point.

Via Coccinelle patch:

    @@
    expression a, b;
    @@

    -nir_def_rewrite_uses_after(a, b, b->parent_instr)
    +nir_def_rewrite_uses_after_def(a, b)

Followed by a bunch of sed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36489>
2025-08-01 15:34:24 +00:00
Alyssa Rosenzweig
cc6e3b84cb treewide: use nir_def_as_*
Via Coccinelle patch:

    @@
    expression definition;
    @@

    -nir_instr_as_alu(definition->parent_instr)
    +nir_def_as_alu(definition)

    @@
    expression definition;
    @@

    -nir_instr_as_intrinsic(definition->parent_instr)
    +nir_def_as_intrinsic(definition)

    @@
    expression definition;
    @@

    -nir_instr_as_phi(definition->parent_instr)
    +nir_def_as_phi(definition)

    @@
    expression definition;
    @@

    -nir_instr_as_load_const(definition->parent_instr)
    +nir_def_as_load_const(definition)

    @@
    expression definition;
    @@

    -nir_instr_as_deref(definition->parent_instr)
    +nir_def_as_deref(definition)

    @@
    expression definition;
    @@

    -nir_instr_as_tex(definition->parent_instr)
    +nir_def_as_tex(definition)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36489>
2025-08-01 15:34:24 +00:00
Marek Olšák
5531f01326 nir: move list.h outside the glsl directory
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36425>
2025-07-31 20:23:02 +00:00
Antonio Ospite
ddf2aa3a4d build: avoid redefining unreachable() which is standard in C23
In the C23 standard unreachable() is now a predefined function-like
macro in <stddef.h>

See https://android.googlesource.com/platform/bionic/+/HEAD/docs/c23.md#is-now-a-predefined-function_like-macro-in

And this causes build errors when building for C23:

-----------------------------------------------------------------------
In file included from ../src/util/log.h:30,
                 from ../src/util/log.c:30:
../src/util/macros.h:123:9: warning: "unreachable" redefined
  123 | #define unreachable(str)    \
      |         ^~~~~~~~~~~
In file included from ../src/util/macros.h:31:
/usr/lib/gcc/x86_64-linux-gnu/14/include/stddef.h:456:9: note: this is the location of the previous definition
  456 | #define unreachable() (__builtin_unreachable ())
      |         ^~~~~~~~~~~
-----------------------------------------------------------------------

So don't redefine it with the same name, but use the name UNREACHABLE()
to also signify it's a macro.

Using a different name also makes sense because the behavior of the
macro was extending the one of __builtin_unreachable() anyway, and it
also had a different signature, accepting one argument, compared to the
standard unreachable() with no arguments.

This change improves the chances of building mesa with the C23 standard,
which for instance is the default in recent AOSP versions.

All the instances of the macro, including the definition, were updated
with the following command line:

  git grep -l '[^_]unreachable(' -- "src/**" | sort | uniq | \
  while read file; \
  do \
    sed -e 's/\([^_]\)unreachable(/\1UNREACHABLE(/g' -i "$file"; \
  done && \
  sed -e 's/#undef unreachable/#undef UNREACHABLE/g' -i src/intel/isl/isl_aux_info.c

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36437>
2025-07-31 17:49:42 +00:00
Marek Olšák
8d3e76c250 nir: split nir_move_load_frag_coord from nir_move_load_input
It's a pure system value on AMD, not an input.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:48 -04:00
Marek Olšák
688a639117 nir: add nir_tex_instr::can_speculate
Set to true everywhere except:
- spirv_to_nir used by Vulkan
- bindless handles in GLSL
- some internal shaders and driver-specific code

Acked-by: Job Noorman <job@noorman.info>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36099>
2025-07-24 18:41:38 +00:00
Alyssa Rosenzweig
8a1a410389 treewide: use SWAP macro
Via Coccinelle patch + manual clean up:

    @@
    identifier temporary, a, b;
    type T;
    @@

    -T temporary = a;
    -a = b;
    -b = temporary;
    +SWAP(a, b);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36297>
2025-07-23 19:49:47 +00:00
Alyssa Rosenzweig
803e61837e agx: reassociate ALU
GL:

   total instrs in shared programs: 2881862 -> 2801415 (-2.79%)
   instrs in affected programs: 2264277 -> 2183830 (-3.55%)

   total alu in shared programs: 2362306 -> 2281986 (-3.40%)
   alu in affected programs: 1882190 -> 1801870 (-4.27%)

   total fscib in shared programs: 2359848 -> 2279314 (-3.41%)
   fscib in affected programs: 1891013 -> 1810479 (-4.26%)

   total ic in shared programs: 661722 -> 661702 (<.01%)
   ic in affected programs: 1304 -> 1284 (-1.53%)

   total gprs in shared programs: 899341 -> 900319 (0.11%)
   gprs in affected programs: 48696 -> 49674 (2.01%)

   total uniforms in shared programs: 2069880 -> 2064570 (-0.26%)
   uniforms in affected programs: 426411 -> 421101 (-1.25%)

   total threads in shared programs: 27802432 -> 27802624 (<.01%)
   threads in affected programs: 5568 -> 5760 (3.45%)

   total preamble in shared programs: 1202295 -> 1222360 (1.67%)
   preamble in affected programs: 452890 -> 472955 (4.43%)

VK:

   Totals:
   MaxWaves: 53077184 -> 53075712 (-0.00%); split: +0.05%, -0.05%
   Instrs: 23845634 -> 23561020 (-1.19%); split: -1.22%, +0.02%
   CodeSize: 170339242 -> 168601666 (-1.02%); split: -1.04%, +0.02%
   Spills: 65594 -> 65784 (+0.29%); split: -1.43%, +1.72%
   Fills: 43190 -> 43178 (-0.03%); split: -2.21%, +2.18%
   Scratch: 404208 -> 403474 (-0.18%); split: -0.27%, +0.08%
   ALU: 18566800 -> 18288141 (-1.50%); split: -1.52%, +0.02%
   FSCIB: 18511881 -> 18230860 (-1.52%); split: -1.54%, +0.02%
   IC: 5260462 -> 5259748 (-0.01%); split: -0.02%, +0.00%
   GPRs: 3831837 -> 3838887 (+0.18%); split: -0.25%, +0.43%
   Uniforms: 10453510 -> 10443173 (-0.10%); split: -0.29%, +0.19%
   Preamble instrs: 10409287 -> 10496713 (+0.84%); split: -0.10%, +0.94%

   Totals from 32343 (59.87% of 54019) affected shaders:
   MaxWaves: 31027072 -> 31025600 (-0.00%); split: +0.08%, -0.08%
   Instrs: 19806186 -> 19521572 (-1.44%); split: -1.46%, +0.03%
   CodeSize: 141121024 -> 139383448 (-1.23%); split: -1.25%, +0.02%
   Spills: 65252 -> 65442 (+0.29%); split: -1.44%, +1.73%
   Fills: 42745 -> 42733 (-0.03%); split: -2.23%, +2.20%
   Scratch: 403096 -> 402362 (-0.18%); split: -0.27%, +0.08%
   ALU: 15544339 -> 15265680 (-1.79%); split: -1.82%, +0.03%
   FSCIB: 15491754 -> 15210733 (-1.81%); split: -1.84%, +0.03%
   IC: 4817376 -> 4816662 (-0.01%); split: -0.02%, +0.01%
   GPRs: 2735551 -> 2742601 (+0.26%); split: -0.35%, +0.61%
   Uniforms: 7717506 -> 7707169 (-0.13%); split: -0.39%, +0.25%
   Preamble instrs: 7713698 -> 7801124 (+1.13%); split: -0.14%, +1.27%

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36147>
2025-07-22 23:17:01 +00:00
Alyssa Rosenzweig
7a786a9c7a agx: run more opt passes
preparing for reassoc

GL mostly noise, Vulkan:

Totals from 32853 (60.82% of 54019) affected shaders:
MaxWaves: 31747776 -> 31758272 (+0.03%); split: +0.04%, -0.01%
Instrs: 18017616 -> 18016663 (-0.01%); split: -0.11%, +0.11%
CodeSize: 128159164 -> 128249442 (+0.07%); split: -0.13%, +0.20%
Spills: 63634 -> 62658 (-1.53%); split: -1.83%, +0.30%
Fills: 42547 -> 41669 (-2.06%); split: -2.51%, +0.44%
Scratch: 341914 -> 341748 (-0.05%); split: -0.09%, +0.04%
ALU: 13999432 -> 13998308 (-0.01%); split: -0.13%, +0.12%
FSCIB: 13979325 -> 13978584 (-0.01%); split: -0.13%, +0.12%
IC: 3953418 -> 3957996 (+0.12%); split: -0.03%, +0.14%
GPRs: 2621294 -> 2619432 (-0.07%); split: -0.13%, +0.06%
Uniforms: 7118591 -> 7040633 (-1.10%); split: -1.91%, +0.82%
Preamble instrs: 6800746 -> 6571058 (-3.38%); split: -3.76%, +0.39%

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36147>
2025-07-22 23:17:01 +00:00
Alyssa Rosenzweig
ecc51d9b9b agx: make sure denorm flushing really happens
Backport-to: 25.1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36147>
2025-07-22 23:17:01 +00:00
Alyssa Rosenzweig
a85219f89f asahi: use tex builders
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36050>
2025-07-21 12:11:42 +00:00
Alyssa Rosenzweig
ca255cb703 hk: always lower bindless samplers
oddly only a single CTS case hits this.

dEQP-VK.subgroups.uniform_descriptor_indexing.combined_image_sampler

Fixes: 642c6c6f62 ("hk,agx: promote bindless samplers")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36257>
2025-07-21 11:42:20 +00:00
Alyssa Rosenzweig
a60755c015 agx: use immediate load ts/ss forms
Honeykrisp appreciates this. Funny looking fossil stats:

Totals:
Preamble instrs: 10638975 -> 10435998 (-1.91%); split: -1.91%, +0.00%

Totals from 23612 (43.71% of 54019) affected shaders:
Preamble instrs: 5104103 -> 4901126 (-3.98%); split: -3.98%, +0.00%

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36257>
2025-07-21 11:42:20 +00:00
Alyssa Rosenzweig
e48d1ca349 agx: optimize imgwblk uniform
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36257>
2025-07-21 11:42:20 +00:00
Alyssa Rosenzweig
1ded5f55e8 agx: optimize txl LOD
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36257>
2025-07-21 11:42:20 +00:00
Alyssa Rosenzweig
2dd91b0d1c agx: simplify block image store offset
just make 32-bit offset.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36257>
2025-07-21 11:42:20 +00:00
Alyssa Rosenzweig
cbbc24a473 agx: fix dead phis
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36257>
2025-07-21 11:42:20 +00:00
Alyssa Rosenzweig
2308960bed treewide: use nir_mov_scalar
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Via Coccinelle patch:

    @@
    expression builder, scalar;
    @@

    -nir_channel(builder, scalar.def, scalar.comp)
    +nir_mov_scalar(builder, scalar)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36142>
2025-07-16 18:59:16 +00:00
Alyssa Rosenzweig
a5e9669a78 hk: only pass sampler heap if needed
I'm guessing the hardware needs to prefetch the whole sampler heap, so if we're
not gonna use it, let's omit it. I don't know if this helps, but it can't hurt.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36127>
2025-07-16 18:27:22 +00:00
Alyssa Rosenzweig
642c6c6f62 hk,agx: promote bindless samplers
via the bindless_sampler_agx intrinsic.

Totals from 29771 (55.11% of 54019) affected shaders:
MaxWaves: 28934080 -> 28938304 (+0.01%); split: +0.02%, -0.00%
Instrs: 16623874 -> 16369120 (-1.53%); split: -1.54%, +0.01%
CodeSize: 117532138 -> 115994992 (-1.31%); split: -1.32%, +0.01%
Spills: 12721 -> 12652 (-0.54%); split: -0.72%, +0.17%
Fills: 6733 -> 6636 (-1.44%); split: -1.96%, +0.52%
Scratch: 132994 -> 132712 (-0.21%); split: -0.22%, +0.01%
ALU: 13054253 -> 12803059 (-1.92%); split: -1.93%, +0.01%
FSCIB: 13054138 -> 12802912 (-1.92%); split: -1.94%, +0.01%
IC: 3916012 -> 3915588 (-0.01%); split: -0.01%, +0.00%
GPRs: 2290907 -> 2289519 (-0.06%); split: -0.07%, +0.01%
Uniforms: 6794773 -> 6696943 (-1.44%); split: -1.44%, +0.00%
Preamble instrs: 6953594 -> 7024455 (+1.02%); split: -0.37%, +1.39%

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36127>
2025-07-16 18:27:21 +00:00
Alyssa Rosenzweig
4a9ae295cd agx: report sampler state count
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36127>
2025-07-16 18:27:20 +00:00
Alyssa Rosenzweig
0bd1cd3230 agx: fix incorrect 16-bit promotions with comparisons
hardware seems to sign extend with a signed comparison, which I guess is
reasonable! so our logic was busted if we had a zero-extend source with a signed
comparison. this broke someone's OpenCL app, and could probably be hit from
GLES/Vulkan too...

on fossil-db, only parallel-rdp affected:

Totals from 312 (0.58% of 53701) affected shaders:
Instrs: 404772 -> 405697 (+0.23%); split: -0.01%, +0.24%
CodeSize: 2863314 -> 2868998 (+0.20%); split: -0.01%, +0.21%
Spills: 40239 -> 40286 (+0.12%); split: -0.02%, +0.14%
Fills: 33763 -> 33810 (+0.14%); split: -0.03%, +0.17%
ALU: 290757 -> 291071 (+0.11%); split: -0.02%, +0.13%
FSCIB: 261844 -> 262652 (+0.31%); split: -0.02%, +0.33%
IC: 230312 -> 230336 (+0.01%); split: -0.01%, +0.02%
GPRs: 24656 -> 24648 (-0.03%); split: -0.05%, +0.02%

Reported-by: RowanG
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:18 -04:00
Alyssa Rosenzweig
702d8c9387 hk: promote bindless textures
Totals from 26546 (49.43% of 53701) affected shaders:
MaxWaves: 25656256 -> 25683456 (+0.11%); split: +0.11%, -0.00%
Instrs: 16471320 -> 15911888 (-3.40%); split: -3.42%, +0.02%
CodeSize: 116099620 -> 112036602 (-3.50%); split: -3.53%, +0.03%
Spills: 63650 -> 63400 (-0.39%); split: -0.48%, +0.08%
Fills: 42179 -> 41886 (-0.69%); split: -0.88%, +0.19%
Scratch: 343540 -> 343040 (-0.15%); split: -0.16%, +0.01%
ALU: 12932573 -> 12386766 (-4.22%); split: -4.25%, +0.03%
FSCIB: 12931874 -> 12385806 (-4.22%); split: -4.25%, +0.03%
IC: 3809190 -> 3807544 (-0.04%); split: -0.05%, +0.00%
GPRs: 2015525 -> 2004665 (-0.54%); split: -0.56%, +0.02%
Uniforms: 6215004 -> 5869441 (-5.56%); split: -5.57%, +0.01%
Preamble instrs: 6592883 -> 6655742 (+0.95%); split: -0.08%, +1.03%

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:18 -04:00
Alyssa Rosenzweig
2fca9dcedf asahi/clc: promote bindless textures
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:18 -04:00
Alyssa Rosenzweig
ffe262ee11 agx: add bindless texture promotion support
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:17 -04:00
Alyssa Rosenzweig
83ad08feff agx: plumb texture state store instruction
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:17 -04:00
Alyssa Rosenzweig
50e7a6ef82 agx: handle image_sparse_load
no need for bindless with sparse.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:17 -04:00
Alyssa Rosenzweig
ee26938faf nir,agx: switch to bindless_image_agx intrinsic
this is more explicit than vec2's and hence has fewer footguns. in particular
it's easier to handle with preambles in a sane way.

modelled on what ir3 does.

there's probably room for more clean up but for now this unblocks what I want to
do.

stats don't seem concerning.

Totals from 692 (1.29% of 53701) affected shaders:
MaxWaves: 441920 -> 442112 (+0.04%)
Instrs: 1588748 -> 1589304 (+0.03%); split: -0.05%, +0.08%
CodeSize: 11487976 -> 11491620 (+0.03%); split: -0.04%, +0.07%
ALU: 1234867 -> 1235407 (+0.04%); split: -0.06%, +0.10%
FSCIB: 1234707 -> 1235249 (+0.04%); split: -0.06%, +0.10%
IC: 380514 -> 380518 (+0.00%)
GPRs: 117292 -> 117332 (+0.03%); split: -0.08%, +0.11%
Preamble instrs: 314064 -> 313948 (-0.04%); split: -0.05%, +0.01%

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:17 -04:00
Alyssa Rosenzweig
7f23f37e82 agx: add stats for preamble inst
we don't need detail but this is a good way to make sure we don't make things
blow up.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:17 -04:00
Alyssa Rosenzweig
d55bdb4ec5 nir/opt_preamble: add "register class" concept
Class represents an indexed "ideal" register class, where non-general classes
only allow defs that choose that class in the def_size callback.
nir_opt_preamble will try to assign specialized classes where possible, falling
back to the general class once the special-purpose classes are exhausted.

AGX will use this mechanism to promote bindless texture handles to bound texture
registers where possible, falling back to pushing the handle as a uniform where
not possible. Supporting multiple classes in nir_opt_preamble allows this
multi-level hoisting to work in a single nir_opt_preamble call with proper
global behaviour.

Add this concept to nir_opt_preamble so we can use it in AGX later in this MR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Job Noorman <job@noorman.info>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949>
2025-07-10 14:55:17 -04:00
Alyssa Rosenzweig
5270b65d3e agx: lower alu after scalarizing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35989>
2025-07-08 17:09:16 +00:00
Daniel Schürmann
2c51a8870d nir: add nir_vectorize_cb callback parameter to nir_lower_phis_to_scalar()
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Similar to nir_lower_alu_width(), the callback can return the
desired number of components for a phi, or 0 for no lowering.

The previous behavior of nir_lower_phis_to_scalar() with lower_all=true
can be elicited via nir_lower_all_phis_to_scalar() while the previous
behavior with lower_all=false now corresponds to nir_lower_phis_to_scalar()
with NULL callback.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35783>
2025-07-08 15:33:59 +00:00
Marek Olšák
8def3f865d agx,freedreno,intel,lima,panfrost,svga,virgl,zink: fix supports_indirect_inputs
The GLSL compiler always lowers inputs to temps for VS and GS, so exclude
them from driver support because the GLSL compiler will no longer do that
unconditionally. Thus, indirect VS and GS inputs are completely untested
and broken in a lot of drivers.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35945>
2025-07-08 06:11:42 +00:00