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agx: plumb is_alu query for reg cache opt

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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36399>
This commit is contained in:
Alyssa Rosenzweig 2025-07-31 11:27:19 -04:00
parent a27e51f3c1
commit d9c0971e50
2 changed files with 16 additions and 3 deletions
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2
src/asahi/compiler/agx_compiler.h
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@ -1112,6 +1112,8 @@ struct agx_cycle_estimate {
struct agx_cycle_estimate agx_estimate_cycles(agx_context *ctx);
bool agx_is_alu(const agx_instr *I);
extern int agx_compiler_debug;
#ifdef __cplusplus

17
src/asahi/compiler/agx_performance.c
View file

@ -112,6 +112,19 @@ struct alu_timing op_timings[] = {
};
/* clang-format on */
static struct alu_timing
alu_timing(const agx_instr *I)
{
return I->op < ARRAY_SIZE(op_timings) ? op_timings[I->op]
: (struct alu_timing){0};
}
bool
agx_is_alu(const agx_instr *I)
{
return alu_timing(I).unit != NONE;
}
/*
* TODO: Model non-ALU instructions, latency, register cache, 64-bit, etc.
*/
@ -121,9 +134,7 @@ agx_estimate_cycles(agx_context *ctx)
struct agx_cycle_estimate est = {0};
agx_foreach_instr_global(ctx, I) {
struct alu_timing alu = I->op < ARRAY_SIZE(op_timings)
? op_timings[I->op]
: (struct alu_timing){0};
struct alu_timing alu = alu_timing(I);
if (alu.unit == IC) {
est.ic += alu.tp * 2;