Commit graph

11918 commits

Author SHA1 Message Date
Timur Kristóf
0e7244ce18 radv: Disallow IB2 on GFX6 when using draw_indirect_multi.
GFX6 has the same problem as GFX7 here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00
Timur Kristóf
add3b34c17 radv/amdgpu: Remove unnecessary assertions from chaining.
These used to guard against chaining on GFX6 and on HW IP types
that don't support chaining, but these things are now guarded
elsewhere and these assertions are no longer necessary.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00
Harri Nieminen
f85f511a38 amd: fix typos in code
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
aea48a4ff1 amd: fix typos
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Samuel Pitoiset
0b4e7491f3 radv: fix detecting FMASK_DECOMPRESS/DCC_DECOMPRESS meta pipelines
With the on_demand shaders feature, meta pipelines are only created
when they are used, otherwise they are NULL. Though, inside secondary
cmdbuffers, the graphics pipeline might be also NULL. In this specific
case, radv_is_{dcc,fmask}_decompress_pipeline() would return
TRUE because these pipelines are NULL too...

This fixes flakes with tests that use secondary cmdbuffers with
TC-compat images.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22440>
2023-04-13 09:00:38 +00:00
Qiang Yu
45826e42c5 ac,aco: move gfx10 ngg prim count zero workaround to nir
To simplify both llvm and aco backend and remove unnecessary
workaround code where prim count is known to be not zero.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22381>
2023-04-13 08:12:03 +00:00
Samuel Pitoiset
3320eee877 radv: cleanup after splitting radv_pipeline.c
I moved to many things to radv_pipeline_graphics.c without checking.

Fixes: 7783b7f697 ("radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22441>
2023-04-13 02:21:44 +00:00
Timur Kristóf
7036d1a155 ac/nir/ngg: Don't store primitive IDs from culled primitives.
Primitive export used the gs_accepted variable after culling,
so we overwrote this variable after vertex compaction to make
sure not to hang the GPU.

This had an unintended side effect when storing the primitive ID
to LDS on GS threads: the LDS store was done even on threads whose
triangle was culled; potentially causing issues.

As a fix, create a separate boolean variable that remembers
which invocations need to export a primitive; and don't store
the primitive ID to LDS when gs_accepted is false.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8805
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22424>
2023-04-12 23:55:37 +00:00
Bas Nieuwenhuizen
ba73a41a2b radv: Reserve space for fast clear related writes.
Fixes: 9ee67467c9 ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
2023-04-12 20:31:47 +00:00
Bas Nieuwenhuizen
1b5bd0f1c0 radv: Reserve space for updating DCC metadata.
Fixes: 9ee67467c9 ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
2023-04-12 20:31:47 +00:00
Bas Nieuwenhuizen
771c0f0e65 radv: Reserve space in si_cs_emit_cache_flush.
Fixes: 4c6f83006d ("radv: Synchronization for task shaders.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
2023-04-12 20:31:47 +00:00
Bas Nieuwenhuizen
1de978b873 radv: Reserve space in conditional rendering functions.
Fixes: e45ba51ea4 ("radv: add support for VK_EXT_conditional_rendering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
2023-04-12 20:31:47 +00:00
Bas Nieuwenhuizen
7f47d764e1 radv: Reserve space in various streamout functions.
Fixes: b4eb029062 ("radv: implement VK_EXT_transform_feedback")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
2023-04-12 20:31:47 +00:00
Bas Nieuwenhuizen
4879f309a6 radv: Reserve space in framebuffer emission.
In the execute secondary scenario nothing else does it for us.

Fixes: 203f60ebf2 ("radv: emit framebuffer state from primary if secondary doesn't inherit it")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
2023-04-12 20:31:47 +00:00
Georg Lehmann
0c8394908c aco/tests: add missing dependency on generated header
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8820
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22442>
2023-04-12 20:00:09 +00:00
Timur Kristóf
bd3191dbfe aco, radv: Remove redundant enable_mrt_output_nan_fixup from PS epilog info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
2023-04-12 17:30:02 +00:00
Timur Kristóf
af768afcbf aco, radv: Remove "key" from aco_compiler_options.
aco_compiler_options::key is a leftover from when aco used
the radv_pipeline_key struct, but aco_compiler_options::key was
never actually used as a cache key.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
2023-04-12 17:30:02 +00:00
Timur Kristóf
80d8e8d828 aco: Remove setup_*_variables and add setup_lds_size instead.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
2023-04-12 17:30:02 +00:00
Timur Kristóf
facecd87e1 radv: Don't hardcode LDS granularity in gfx9_get_gs_info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
2023-04-12 17:30:02 +00:00
Timur Kristóf
4ae46840cd ac, aco, radv: Clarify LDS size on GFX6, and NGG shaders.
This information was wrong in some places, let's fix it now.

GFX6:
The GPU has 64KB LDS, but only 32KB is usable by a workgroup.

NGG:
There was some misinformation about NGG only being able to
address 32 KB LDS, it turns out this is actually not true
and it can address the full 64K.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
2023-04-12 17:30:02 +00:00
Samuel Pitoiset
4f3ddf31e0 radv: fix pipeline creation feedback with imported graphics libs
Stages imported from graphics pipeline libraries are defined as
additional entries in the order they were imported. This is similar
to raytracing libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22288>
2023-04-12 15:03:42 +00:00
Samuel Pitoiset
7783b7f697 radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21811>
2023-04-12 11:18:45 +00:00
Samuel Pitoiset
8f76a6a26e radv/ci: remove one RT test from the expected failures on RDNA3
It does pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22413>
2023-04-12 07:33:31 +00:00
Timur Kristóf
b51e858d68 radv/amdgpu: Place secondary CS without IB2 in non-WC GTT.
When using a secondary CS without IB2, we have to memcpy the
contents into the primary CS. Use these flags to improve perf
by preventing memcpy from VRAM.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
7c5bf91350 radv/amdgpu: Extract radv_amdgpu_cs_bo_create function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
0c1d4130ca radv/amdgpu: Add bool is_secondary argument to cs_create function.
Also save is_secondary to the CS object.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
c0fe6bbef1 radv: Allow task/mesh shaders with RADV_DEBUG=noibs.
The new submit code path should now be able to handle gang submit
even when chaining is not enabled.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
dc59a6b2ee radv/amdgpu: Respect maximum number of submitted IBs per IP type.
In a gang submit, the maximum number of IBs is per IP type,
and is different for each queue. Let's respect that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
e4a37547a5 radv/amdgpu: Clean up submission functions.
Remove a useless extra function call, and rename fallback to
internal because it is the only code path left.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
50e6b16855 radv/amdgpu: Use fallback submit for queues that can't use IBs.
This commit consolidates the queue submit code paths into one.

Now we always allocate BOs for every CS, but when IBs aren't
allowed, we simply submit every BO to the kernel.

A microbenchmark done by Bas indicated that submitting more IBs to
the kernel only adds a negligible overhead. Additionally, this
allows us to stop copying the command buffer contents in system
memory and get rid of a lot of legacy code.

In order to be able to submit every BO, we make sure to add the
last BO to the old_ib_buffers array on cs_finalize. This also
necessitates some changes in cs_execute_secondary and other
functions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
958ea2ec2a radv: Split submission in winsys instead of radv_queue.
This will still make it so that RADV_DEBUG=hang will only submit
one command buffer at a time, but otherwise let's pass all CS
objects into one submission and let the winsys split them if
necessary.

The winsys can do a better job at splitting them because
radv_queue has no knowledge of IBs and ignores chaining in the
splitting logic.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
41a9bced31 radv: Fill continue preambles and postambles properly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
1bdc1bd36c radv/amdgpu: Split gang submissions correctly when not chained.
In a gang submit, the follower (typically ACE) and leader
(typically GFX) can have synchronization between each other.
We must ensure that these end up in the same submission,
otherwise we can deadlock the GPU.

We rely on radv_queue here to order follower before the leader
in the submitted CS array.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
813885f682 radv/amdgpu: Add ability to submit non-chained CS to fallback.
When submitting a CS whose IP type doesn't support chaining,
let's submit all the IBs that this CS allocated.

This is going to be better than the sysmem code path because it
doesn't require the winsys to memcpy the contents of the command
buffers.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf
e4dd6a8eb3 radv/amdgpu: Add postambles to fallback submit.
Some new features, such as perf counters and gang submit use
postambles. Implement these properly.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
103ebe96c0 radv/amdgpu: Add continue preambles to fallback submit.
When splitting a larger submission into several smaller ones,
the flushing at the beginning of the initial preambles is not
really necessary, so it'll be better to use the continue
preambles for this purpose.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
6844506c3d radv/amdgpu: Allow multiple continue preambles.
For feature parity with initial preambles.
Previously, continue preambles were for GFX6 only, but this is
about to change in the next commits.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
8cea452bda radv/amdgpu: Rewrite fallback code path so it can split submissions.
Currently, radv_queue already splits submissions but we want to
change this and be able to split them in the winsys code as well.
Necessary because we want to split based on number of actual
IBs not number of command buffers, but radv_queue is not
aware of IBs.

Note that this commit does not actually take this new split into
use yet, that will be done in a following commit when it is ready,
this is why we set the max IB count higher than radv_queue here.

This commit is the first step in making "fallback" the default and
only submission code path.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
df90102a15 radv/amdgpu: Remove hw_can_chain in favour of use_ib.
They have the same meaning, but use_ib makes more sense because it
also takes the gfx_level into account.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
ccb4b78840 radv/amdgpu: Add a few assertions during submit.
These are useful when debugging the submission code.

- Ensure correct IB alignment
- Ensure we don't submit empty IBs

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
e5201987b1 radv/amdgpu: Extract radv_amdgpu_cs_add_old_ib_buffer.
This function will be used elsewhere in a following commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
44de40fb5f radv/amdgpu: Use correct alignment when creating CS BOs.
Shouldn't matter in practice because the kernel will likely
give us a page-aligned BO, but better to specify it just
in case.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
e214059120 radv/amdgpu: Only allow IB BOs on graphics and compute queues.
This disallows IB BOs on eg. SDMA queues which was previously
mistakenly left out.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
a7080fe4ef radv/amdgpu: Fix mismatching return type of radv_amdgpu_cs_submit.
Fixes a warning that is reported by GCC 13.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
daeb409559 ac: Add maximum number of submitted IBs.
The number of IBs per submit isn't infinite, it depends on the IP type
(ie. some initial setup needed for a submit) and the packet size.
It can be calculated according to the kernel source code as:
(ring->max_dw - emit_frame_size) / emit_ib_size

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf
87d22933ae radv: Create continue preamble on GFX6 even when no shader rings are used.
Skipping the continue preamble can allow other processes to mess
up some	registers set by the current process.

Originally, we could omit generating the continue preamble when
no shader rings were used, because the register initialization
happened at the beginning of every main cmdbuf. However, this
isn't the case anymore.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
David Heidelberg
1fa1c285fc ci/amd: add draw.dynamic_rendering flake
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22411>
2023-04-11 15:10:37 +00:00
Bas Nieuwenhuizen
a8cb837703 radv: Align atomic values.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22121>
2023-04-11 12:57:15 +00:00
Samuel Pitoiset
9ccaf5583f radv: fix re-emitting vertex user SGPRs when binding a graphics pipeline
The base SGPR and the number of SGPRs can be equal but it was incorrect
because one VS can have draw_id and one can have base_instance. Fix
this by invalidating the vertex user SGPRs unconditionally.

Though they should also be invalidated after executing secondaries,
otherwise nothing is invalidated if the same pipeline is bind to the
primary again.

This fixes dEQP-VK.dynamic_rendering.primary_cmd_buff.random.seed*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21652>
2023-04-11 12:12:05 +00:00
Daniel Schürmann
35805d172a radv/ci: add 2 more Flakes for Navi21
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
2023-04-11 11:38:15 +00:00