This also includes support for the new job cookie system, verifying that jobs
running originate from the claimed source. This is useful internally but won't
affect users, unlike the feature in the title :)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37609>
(cherry picked from commit c3957860b8)
Commit 2aaa6ebb "build/amd: add amd-use-llvm build option"
allows to build radeonsi and radv without LLVM dependency
so LLVM constraint is applicable when amd-use-llvm=true
Fixes: 82047fa8 ("amd: drop support for LLVM 15, 16, 17")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37695>
(cherry picked from commit dd2476a257)
float_controls2 may have marked these as needing to preserve NaN or
other values. If so, our newly contracted ffma needs to as well.
Fixes dEQP-VK.spirv_assembly.instruction.compute.float_controls2.*.input_args.mat_det_testedWithout_NotNan*
when nir_opt_algebraic is run after this pass.
Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36750>
(cherry picked from commit 1b0808adf3)
For some reason we missed adding this. This prevents some asserts
from triggering when I call divergence analysis at certain points
in an upcoming patch.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36750>
(cherry picked from commit 25cb6dfbf7)
For an image created either without a modifier to share or as the
destination image to get rid of compression by re-allocation, it
should have compression disabled.
Close: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13729
(Fix firefox misrendering when gfx.wayland.hdr option is true)
Backport-to: 25.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37098>
(cherry picked from commit 5aa4dc7f77)
The functionality is provided by isl_surf_supports_ccs().
Also, move the protected content restriction to
iris_resource_configure_aux(). I'm not aware of any reason protected
content wouldn't support CCS. However, to keep this series simple,
enabling that combination is left for another time.
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37168>
Allow CCS for non-display linear surfaces in isl_surf_supports_ccs().
We're going to rely more on the helper to determine CCS-enabling for Xe2
on iris.
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37168>
The compression format is only used during rendering.
This prevents drivers from hitting an unreachable when we start enabling
CCS on linear surfaces which may have non-renderable and non-pow2 formats.
For now, continue to use the surface format instead of the view format
to look up the CMF. This strategy should return the optimal CMF for
compressed surfaces that undergo redescription during copies.
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37168>
On XeKMD, BOs need to be created with a vm_id of zero in order to get
prime handles. That only occurs if the image was created with
PIPE_BIND_SHARED/BO_ALLOC_SHARED. Ensure that shareable images have this
flag in iris_flush_resource().
Fixes the dmabufshare demo on BMG with INTEL_DEBUG=noccs and mesa hacked
to disable suballocation.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13511
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37168>
If the (NIR) destination is a register (i.e., not an SSA value), the
destination of the BRW instruction will not be is_scalar. This occurs in
some shaders in Final Fantasy XVI (and
finalfantasytype0_1.rdc.2826e29da3722a83.1.foz).
If the destination is not is_scalar, revert most of this code to the
state previous to f3593df877. This means
- Allocate a SIMD1 register and UNDEF it.
- Emit a SIMD1 MOV_RELOC_IMM to that register.
- Emit an additional MOV to expand the SIMD1 result.
Closes: #12520
Fixes: f3593df877 ("brw/nir: Treat load_reloc_const_intel as convergent")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37384>
(cherry picked from commit 23bd356b42)
MR !36998 / commit 72f2565fc9 introduced
an issue where QueryDeviceInfo is not called in eglQueryDeviceBinaryEXT,
which causes the queried UUID to always be zero.
This commit fixes the issue by adding a call to QueryDeviceInfo.
Also, it refactors the inconsistent function names passed to _eglError.
Signed-off-by: Christoph Neuhauser <christoph.neuhauser@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37616>
(cherry picked from commit 5e5bc7a1c7)
This is required for OpenCL but not Vulkan. This fixes a bunch of
OpenCL CTS fails using the SPIR-V back-end in LLVM as opposed to
SPIRV-LLVM-Translator.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37555>
(cherry picked from commit 8ef811b02a)
We currently only support fast clearing the first layer of an image.
Attachments use VkImageView which can specify a base-layer of the view
for an image attachment.
Fixes: 44351d67f8 ("anv: Change params of anv_can_fast_clear_color_view")
Ref: https://projects.blender.org/blender/blender/issues/141181
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37562>
(cherry picked from commit be61c12f3e)
src[1]/src0 is signed and Xe2+ SHR don't support operations over signed
data types so lets switch this over ASR that supports signed data
types.
Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37557>
(cherry picked from commit 141a225ca1)
Turns out just putting the u32 in doesn't work on big endian, so
put the proper u8/u16 values in.
Got a report that since the loop limiter got removed, a gtk4 blur
shader was looping forever on s390x. Turns out it was using a 16-bit
loop variable (because why wouldn't you), and the loop counter was
just staying at 0 all the time.
Cc: mesa-stable
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37593>
(cherry picked from commit e28cfb2bad)
This reverts commit ab5605aab3.
We require 1.78 on 25.2 and we should CI against 1.78 on 25.2.
If something in CI requires a newer version, this should be handled
differently. If we require a newer rustc version because of a dependency
we should properly bump the rustc version requirement.
But please no random bumps like this because we don't want to cause random
build failures due to changes in rustc.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37198>
If a client creates a semaphore, exports it, and then re-imports it back
into the device, this can trick our semaphore reset logic. When this
happens, we end up with two different vk_sync structs that have the same
underlying payload so if one is used as the signal and one is used as
the wait of the same submit, we'll end up resetting it because we think
they're different, causing us to lose the signal.
We already have the ability to handle this for the threaded case by
moving the semaphore payload into a new vk_sync which we then destroy
after we're done submitting to the driver. Use this path for shared
semaphores in the immediate case so we can just wait and signal without
worrying about the reset.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13805
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37149>
(cherry picked from commit 0f7e0f79ad)
Adding zero has the effect of flushing to zero when ftz is set.
This fixes a regression in
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp32.input_args.reflect_denorm_flush_to_zero
An add.ftz changes one of its arguments to negative rather than positive
zero starting in 8d19ffef0a ("nir: Add more matches for `fmulz`") on
that test, which was then triggering copy-prop which brought this
issue to light.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13961
Fixes: 29bfdcd7 ("nak: Add an ftz bit to a bunch of float ops")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37537>
(cherry picked from commit ce1d0ae108)
Commit 534a04d557 optimized agx_resource_from_handle() to lazily
defer assignment of a kms-ro renderonly_scanout object to an imported
resource until its kms winsys handle is actually queried by a caller
via agx_resource_get_handle(), to avoid unnecessary import into the
DCP display controller. Only resources with bind flag PIPE_BIND_SCANOUT
will get a renderonly_scanout object assigned during such queries.
Problem: This prevents Mesa GBM's gbm_bo_import() function from properly
importing dmabufs for direct scanout use by some Wayland compositors,
e.g., GNOME mutter.
gbm_bo_import() of dmabuf fd's (GBM_BO_IMPORT_FD / GBM_BO_IMPORT_FD_MODIFIER),
even with GBM_BO_USE_SCANOUT flag, will not mark an imported bo with the
PIPE_BIND_SCANOUT bind flag before internally assigning its KMS winsys
handle via screen->resource_get_handle() -> agx_resource_get_handle(),
causing silent failure of that query. Therefore gbm_bo_import() seems
to return a successfully created gbm_bo with all proper properties,
but gbm_bo_get_handle() and gbm_bo_get_handle_for_plane() will return
invalid handles. These invalid handles cause drmAddFbXXX ioctl calls to
fail, and therefore failure of direct scanout of wl_buffers.
Setting PIPE_BIND_SCANOUT for a resource in agx_resource_from_handle()
may retain the optimization and makes gbm_bo_get_handle[_for_plane]()
work. This fixes direct scanout of fullscreen wl_surface / wl_buffers
under at least GNOME mutter 48.
Fixes: 534a04d557 ("asahi: Flip kmsro around to allocate on the GPU")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37538>
(cherry picked from commit fc44e708d7)
If bo->size = lseek(); would return a failure value of bo->size ==-1,
then current error handling would return while leaving the already
allocated and cached bo for the dmabuf fd in a half initialized "zombie"
state. On a successive call to agx_bo_import() for the same fd, the
assigned bo->size == -1 would mark the bo as "already initialized",
just bumping its reference count, and then returning a dysfunctional
bo to the caller, leasing to followup failures elsewhere.
Use goto error; instead, where "error:" handling will zero-out the bo,
marking it as effectively uninitialized, and hopefully causing proper
initialization on a successive call to agx_bo_import().
Fixes: df725d4f64 ("asahi: remove agx_bo::dev")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37538>
(cherry picked from commit 3c01205e32)
In very large shaders, first_use_ip, last_use_ip, and even (register) nr
can overflow 16 bits. Increase the size of these fields. Some structure
components are rearranged to promote better packing.
Fixes: 2dad1e3abd ("i965/fs: Add pass to combine immediates.")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37482>
(cherry picked from commit 3e04990c68)
In very large shaders, first_use_ip, last_use_ip, and even (register) nr
can overflow 16 bits. Increase the size of these fields.
used_in_single_block is moved earlier in the structure to promote better
packing.
Fixes: 2dad1e3abd ("i965/fs: Add pass to combine immediates.")
Closes: #9489
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: @joostruis
Tested-by: @Snoucher
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37482>
(cherry picked from commit b7e1ac8309)
We can't use shader->info.stage here because it is only initialized in
pan_shader_compile, which is called after nir_lower_descriptors. This
causes us to miss the index adjustment to make room for the varying
attributes when LD_VAR_BUF is disabled.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Fixes: 7b949dd8c4 ("panvk: Use LD_VAR_BUF[_IMM] when possible")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37471>
(cherry picked from commit 729827878a)
previously this only checked to see if dst was bound, but that is not
the only condition in which clears may be flushed, and triggering a clear
flush while blitting will not set image layouts, which means that a renderpass
could be illegally triggered on an UNDEFINED image (even though it wouldn't be used)
instead, do a much more thorough check to determine whether clears can actually be
stored with the expectation that they will otherwise be flushed
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37467>
(cherry picked from commit d98cf09feb)
this can also be caused by winsys and api being out of sync, e.g.,
if the window resize is lagging behind the framebuffer resize
in this case, just use level 0 and assume things will be okay
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37467>
(cherry picked from commit f9dd9bc30d)
The spec requires these to be decorated as FLAT,
but some apps forgot to set that,
eg. old DXVK before d12a8e09a855
Let's unconditionally decorate these FS inputs as FLAT
in spirv_to_nir, we can do that for free and prevent those
apps from crashing RADV.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33205>
(cherry picked from commit da184ddbe4)
