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ac/nir/ngg: Fix scalarized mesh primitive indices
Take the write_mask into account when storing primitive indices,
otherwise they will end up being stored in the wrong place.
Fixes: 8e24d3426d ("ac/nir/ngg: Refactor MS primitive indices for scalarized IO.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37610>
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3dc9c1a91e
commit
d3579190d6
1 changed files with 8 additions and 1 deletions
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@ -136,15 +136,20 @@ ms_store_prim_indices(nir_builder *b,
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assert(nir_src_is_const(*nir_get_io_offset_src(intrin)));
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assert(nir_src_as_uint(*nir_get_io_offset_src(intrin)) == 0);
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const unsigned write_mask = nir_intrinsic_write_mask(intrin);
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const unsigned component_offset = nir_intrinsic_component(intrin);
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nir_def *store_val = intrin->src[0].ssa;
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assert(store_val->num_components <= 3);
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assert(write_mask && write_mask <= BITFIELD_MASK(s->vertices_per_prim));
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if (store_val->num_components > s->vertices_per_prim)
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store_val = nir_trim_vector(b, store_val, s->vertices_per_prim);
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if (s->layout.var.prm_attr.mask & VARYING_BIT_PRIMITIVE_INDICES) {
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for (unsigned c = 0; c < store_val->num_components; ++c) {
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if (!(write_mask & BITFIELD_BIT(c)))
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continue;
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const unsigned i = VARYING_SLOT_PRIMITIVE_INDICES * 4 + c + component_offset;
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nir_store_var(b, s->out_variables[i], nir_channel(b, store_val, c), 0x1);
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}
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@ -157,7 +162,9 @@ ms_store_prim_indices(nir_builder *b,
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/* The max vertex count is 256, so these indices always fit 8 bits.
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* To reduce LDS use, store these as a flat array of 8-bit values.
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*/
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nir_store_shared(b, nir_u2u8(b, store_val), offset, .base = s->layout.lds.indices_addr + component_offset);
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nir_store_shared(b, nir_u2u8(b, store_val), offset,
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.base = s->layout.lds.indices_addr + component_offset,
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.write_mask = write_mask);
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}
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static void
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