Commit graph

193069 commits

Author SHA1 Message Date
Daniel Schürmann
daac18f2ce aco/util: skip empty blocks in IDSet::insert(IDSet)
Since we don't remove empty blocks on erase(), this avoids
duplicating them unnecessarily.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962>
2024-07-10 12:31:02 +00:00
Daniel Schürmann
6c6f382d68 aco: add RegisterDemand member to Instruction
Since we never need both at the same time, we can use
a union with pass_flags.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962>
2024-07-10 12:31:02 +00:00
Daniel Schürmann
dc851c0aa6 aco/ra: use live_in_demand in should_compact_linear_vgprs()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962>
2024-07-10 12:31:02 +00:00
Connor Abbott
4e2a0a5ad0 ir3: Add descriptor prefetching optimization on a7xx
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Connor Abbott
fdfe86aa52 ir3: Expand preamble rematerialization
Add the ability to deduplicate hoisted expressions, which will be
necessary to avoid repeatedly hoisting the same descriptors and blowing
our budget. The offset calculation may have itself been hoisted into the
preamble, so we also have to be able to hoist a bindless_resource_ir3
referencing a load_preamble and connect it to the source of the
corresponding store_preamble.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Connor Abbott
59940d6577 ir3: Make preamble rematerialization common code
We will need it for prefetching descriptors too. Move it to
ir3_nir_opt_preamble since that seems like the most related place.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Connor Abbott
45a57fa735 ir3: Plumb through descriptor prefetch intrinsics
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Connor Abbott
b39b82dfbd ir3: Don't consider r63.x as a GPR
We have to be careful here because r63.x is also used to mean "register
not assigned yet," but dummy destinations for prefetches will use r63.x
and we don't want them to count as GPRs when determining whether to
enable early preamble.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Connor Abbott
fa8758fc81 ir3: Split out bindless tex/samp encoding
It will be used with prefetching, which is an intrinsic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Connor Abbott
ccf88d940b nir/instr_set: Don't remove matching instruction
We currently assume that the instruction is already inserted and we are
optimizing it away, but in the use case I have where we are hoisting
instructions into a preamble and deduplicating as we go along, that
isn't the case. Move this responsibility onto the caller, which also
makes it a bit clearer what's going on and turns this into something
more similar to an actual set.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Connor Abbott
cda7d9c971 nir/instr_set: Return the matching instruction
This allows use cases where we copy over expression trees and
deduplicate as we go along. We can use the matching instruction to build
up the rest of the expression tree.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873>
2024-07-10 11:54:15 +00:00
Juan A. Suarez Romero
2c74872bbc broadcom/ci: update traces for rpi4
Mainly mark some traces as flake.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30087>
2024-07-10 10:31:24 +00:00
Juan A. Suarez Romero
4bb564f40d broadcom/ci: add more jobs to test with rpi5
Now that there are more rpi5 in the CI, let's add pre-merge jobs.

This also restrict the nightly job to be executed by devices allocated
to run full runs.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30087>
2024-07-10 10:31:24 +00:00
Samuel Pitoiset
56aa1ac74b radv: use ac_is_reduction_mode_supported()
This reduces the number of formats that support filter min/max
reduction on <= GFX8 due to some hw limitations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30074>
2024-07-10 07:57:42 +00:00
Samuel Pitoiset
cc3cb526c4 ac,radeonsi: add ac_is_reduction_mode_supported()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30074>
2024-07-10 07:57:42 +00:00
Samuel Pitoiset
2d29b8b01e radv: disable VK_EXT_sampler_filter_minmax on TAHITI and VERDE
Ported from RadeonSI.

This also explains all the flakes on Tahiti, see
9329f2c15b for reference.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30074>
2024-07-10 07:57:42 +00:00
Samuel Pitoiset
4994c0fa94 radv: use blake3 for hashing pipeline layouts
This should also be faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30089>
2024-07-10 07:35:19 +00:00
Samuel Pitoiset
51c6910ba7 radv: use blake3 for hashing descriptor set layouts
It's faster than sha1, up to 28% with 1M of bindings.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9476
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30089>
2024-07-10 07:35:18 +00:00
Samuel Pitoiset
2c28ed7c5c radv: remove radv_descriptor_set_layout::shader_stages
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30089>
2024-07-10 07:35:18 +00:00
Iago Toral Quiroga
bb63b7b802 v3dv: don't lower fsat on V3D 7.x
This requires that our nir options are different across V3D versions
so we can't use a static global any more.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086>
2024-07-10 08:30:21 +02:00
Iago Toral Quiroga
5b1e88760a v3dv: make nir helpers receive nir compiler options from caller
We are about to make a change that will make compiler options
depend on v3d version, so helpers would usually need additional
parameters to retrieve them. Isntead of doing this, we will make
the callers get the options instead and provide them to the
helpers.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086>
2024-07-10 08:30:15 +02:00
Iago Toral Quiroga
d3a684803d v3d: don't lower fsat on V3D 7.x
This requires that our nir compiler options are different between V3D versions
so we can't use a static global any more.

total instructions in shared programs: 11241106 -> 11047872 (-1.72%)
instructions in affected programs: 4634458 -> 4441224 (-4.17%)
helped: 25119
HURT: 1717
Instructions are helped.

total threads in shared programs: 425238 -> 425036 (-0.05%)
threads in affected programs: 878 -> 676 (-23.01%)
helped: 79
HURT: 180
Inconclusive result (%-change mean confidence interval includes 0).

total loops in shared programs: 1968 -> 1933 (-1.78%)
loops in affected programs: 35 -> 0
helped: 35
HURT: 0
Loops are helped.

total uniforms in shared programs: 3845314 -> 3845219 (<.01%)
uniforms in affected programs: 213615 -> 213520 (-0.04%)
helped: 1338
HURT: 1059
Inconclusive result (value mean confidence interval includes 0).

total max-temps in shared programs: 2224313 -> 2221507 (-0.13%)
max-temps in affected programs: 236054 -> 233248 (-1.19%)
helped: 4863
HURT: 3357
Max-temps are helped.

total spills in shared programs: 4264 -> 4294 (0.70%)
spills in affected programs: 274 -> 304 (10.95%)
helped: 8
HURT: 16

total fills in shared programs: 6638 -> 6497 (-2.12%)
fills in affected programs: 2240 -> 2099 (-6.29%)
helped: 55
HURT: 17

total sfu-stalls in shared programs: 14942 -> 14353 (-3.94%)
sfu-stalls in affected programs: 4863 -> 4274 (-12.11%)
helped: 1287
HURT: 1165
Sfu-stalls are helped.

total inst-and-stalls in shared programs: 11256048 -> 11062225 (-1.72%)
inst-and-stalls in affected programs: 4635701 -> 4441878 (-4.18%)
helped: 25074
HURT: 1728
Inst-and-stalls are helped.

total nops in shared programs: 270482 -> 270621 (0.05%)
nops in affected programs: 27579 -> 27718 (0.50%)
helped: 1583
HURT: 1967
Inconclusive result (value mean confidence interval includes 0).

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086>
2024-07-10 08:30:04 +02:00
Iago Toral Quiroga
33187012ab broadcom/compiler: implement nir_op_fsat
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086>
2024-07-10 08:29:59 +02:00
Iago Toral Quiroga
d62082a131 broadcom/compiler: disallow copy propagation of FMOV exclusive modifiers
Since .sat, .nsat and .max0 are only supported with FMOV we can't copy
propagate an FMOV with any of these unpack modifiers into a different
opcode.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086>
2024-07-10 08:29:50 +02:00
Iago Toral Quiroga
fa959c2993 broadcom/compiler: add new float32 unpack modifiers in V3D 7.x
These are only supported with FMOV.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086>
2024-07-10 08:29:40 +02:00
Christian Gmeiner
ae3e0ae26a etnaviv: isa: Rework branch instruction
Introduce unary and binary versions of the branch instruction. This will
give more ISA_OPC_BRANCH_XXX opcodes to work with. This helps to get rid
of these 'maybe' bitsets and is needed for the assembler.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30030>
2024-07-09 18:33:34 +00:00
Christian Gmeiner
b771d2eef6 etnaviv: isa: Add support for bitset's displayname
In isaspec the displayname of a bitset defines what is shown in
dissassembly. The assembler only sees this representation and
needs to be able to handle it.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30030>
2024-07-09 18:33:34 +00:00
Pierre-Eric Pelloux-Prayer
87439ffed1 ci: bump Fedora and Android libdrm2 to 2.4.122
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30043>
2024-07-09 17:54:49 +00:00
Pierre-Eric Pelloux-Prayer
253f26558a radeonsi, radv: bump libdrm_amdgpu version requirement
This will be needed for virtio native context support.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30043>
2024-07-09 17:54:49 +00:00
Connor Abbott
2c462fe9cc ir3: Fix stg/ldg immediate offset on a7xx
Don't multiply by 4 twice. While we're here, fix the in-bounds check on
a6xx, since we need to account for the multiplying by 4. This was done
correctly on a7xx but the commit below didn't correctly port it to a6xx
when adding the multiply on a6xx.

Fixes: 01bac643f6 ("freedreno/ir3: Fix ldg/stg offset")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30046>
2024-07-09 17:22:15 +00:00
Rob Clark
bde26a32e1 freedreno/drm: Add rd dumper support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30083>
2024-07-09 16:44:47 +00:00
Connor Abbott
c77a4e1db7 tu: Add VPC hardware workaround for a750
This fixes hangs in e.g.
dEQP-VK.transform_feedback.primitives_generated_query.concurrent.pgq_secondary_cmd_buffers.64bit.triangle_list_with_adjacency.draw

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30090>
2024-07-09 13:57:33 +00:00
Connor Abbott
fe6471ded2 freedreno: Fix decoding primitive counter events on a7xx
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30090>
2024-07-09 13:57:33 +00:00
Christian Gmeiner
898752818c nak: Update comment about explicit padding
The bindgen thing is not used anymore and NAK_SHADER_INFO_STAGE_UNION_SIZE
is not defined anywhere.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30094>
2024-07-09 13:44:13 +00:00
Pierre-Eric Pelloux-Prayer
43438aa9c4 radeonsi: fix ac_create_shadowing_ib_preamble parameter
shadowing_preamble is a si_pm4_state but ac_pm4_cmd_add expects a
ac_pm4_state.

Fixes: 428601095c ("ac,radeonsi import PM4 state from RadeonSI")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:28 +02:00
Pierre-Eric Pelloux-Prayer
0a4f3d0b54 radeonsi/tests: correctly parse the family name
62a2ed8602 changed the format of GL_RENDERER and now the family name
is the 2nd word, not the first one.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:28 +02:00
Pierre-Eric Pelloux-Prayer
a7a1e3d329 radeonsi: fix crash in si_update_tess_io_layout_state for gfx8 and earlier
si_set_patch_vertices was only called if tcs.current was non-NULL but
this condition is not enough for GFX9+ since vs is used as ls.

Add a check in si_update_tess_io_layout_state instead, and set
sctx->do_update_shaders for case where the ls_current is not yet
available.
This fix crashes on GFX6.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
e8fc4546ff winsys/radeon: fill lds properties
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
e7b200f20b ac/info: remove has_syncobj
syncobj support is now required so these features are always available.
This is the same as 02fe3c32cd, without the radeonsi parts
to not break radeonsi on radeon.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
2021813450 Revert "ac, radeonsi: remove has_syncobj, has_fence_to_handle"
This reverts commit 02fe3c32cd.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11352
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
84a563cf6f radeonsi: fix buffer_size in si_compute_shorten_ubyte_buffer
buffer_size is not the full buffer size, but the part of the
buffer that is accessed by the compute shader.

This fixes the assert hit in si_set_shader_buffer.

Fixes: 1a99f50c7f ("radeonsi: use a compute shader to convert unsupported indices format")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:27 +02:00
Connor Abbott
c84d1f5571 tu: Support bufferDeviceAddressCaptureReplay on kgsl
We use the method used by the blob, which sets the USE_CPU_MAP flag,
originally intended for SVM, to allocate from a separate address range
and to control the address by passing a preferred address to mmap().

With this we can capture and replay gfxreconstruct traces on kgsl for
apps that use BDA, and we can replay them on msm with a small hack to
increase the address space size:

echo 274877906944 > /sys/module/msm/parameters/address_space_size

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29251>
2024-07-09 09:01:57 +01:00
msizanoen
e5e108706c egl/wayland: Fix direct scanout with EGL_EXT_present_opaque
We select the feedback tranche according to the image format but not the
actual format that we will use for presentation. This breaks direct
scanout in cases where the application selected a visual with an alpha
channel but using EGL_EXT_present_opaque which previously worked as
expected.

Fix this by selecting the feedback tranche according to the actual
presentation format.

Fixes: 9ea9a963aa ("egl/wayland: Fix EGL_EXT_present_opaque")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28153>
2024-07-09 06:42:33 +00:00
Alexandros Frantzis
4cac8468d4 egl/wayland: Fail EGL surface creation if opaque format is unsupported
When using the EGL_EXT_present_opaque extension we create wayland
buffers with the opaque variant of the surface format, while the
underlying image is created with the normal surface format. However,
there is no guarantee that the compositor supports that opaque format,
or that we can use that format with all the modifiers of the surface
format.

Since this is completely out of the control of the application, and the
compositor will disconnect the client with an error if the format is not
supported, this commit:

1. Fails EGL surface creation if it determines that the opaque format
   cannot be used, either because it's not present at all, or because
   it shares no modifier with the non-opaque format.
2. When creating the DRI image ensures that we use a modifier that's
   also supported by the opaque format.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28153>
2024-07-09 06:42:33 +00:00
Alexandros Frantzis
a271a34d59 egl/wayland: Pass dri2_wl_formats to create_dri_image
Make the dri2_wl_formats struct available in create_dri_image, in
preparation for upcoming changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28153>
2024-07-09 06:42:33 +00:00
Samuel Pitoiset
d1c97a1a50 radv: rework generating all graphics state for compiling pipelines
This introduces a new helper that will be used to generate a graphics
pipeline hash from a pCreateInfo struct only. Similar to RT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30049>
2024-07-09 05:48:31 +00:00
Samuel Pitoiset
8f102c9d61 radv: stop passing a pipeline to some graphics related helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30049>
2024-07-09 05:48:30 +00:00
Dave Airlie
fcf5946828 nvk: use 2k overallocation for shader heap.
NVIDIA has informed us via Arthur (and Ben) that 2K
is sufficient here, so move nvk to use that.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29746>
2024-07-09 15:10:30 +10:00
Faith Ekstrand
c7c3942786 nouveau/push: Cache the last header DW to avoid read-back
The pushbuf may live in VRAM in which case readback gets very expensive.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033>
2024-07-09 01:22:23 +00:00
Faith Ekstrand
1c5901c0dc nvk: Put descriptors in VRAM
This improves frame rates in The Witness by another 5% or so.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033>
2024-07-09 01:22:23 +00:00