if the src for a replace_buffer call is mapped after replacement:
* avoid clearing access flags
* update valid range
the pointer access here is always safe because the only case in which
this scenario can occur is if tc is forced to sync immediately after
creating a replaceent buffer, and the replacement buffer's lifetime
will always be exceeded by the lifetime of the real buffer
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107>
when tc replaces a buffer in subdata, it may subsequently perform subdata calls
on the replacement if it is forced to sync during map, e.g.,
* bind_vbo(dst)
* draw
* subdata(src)
* buffer replacement
* map
* tc sync
* replace_buffer(dst, src)
* memcpy <- broken
* draw
in this scenario, src may not have data at the time of replacement,
but it will get data soon after, and this buffer range is the real one
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107>
It is more or less just a code move, but I touched
is_only_used_by_iadd(..) to match the style of the other functions in
that file.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30099>
This puts the legalize routine and the encoder right next to each other
in the code, making it much easier to verify that legalize() enforces
all of the constraints reqauired by encode().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
This pulls them out of the per-SM flow. They're also all no-ops to
legalize since they don't take vectors and are handled directly by RA.
This also means these instructions are now getting properly handled on
Maxwell where we previously trusted in the (probably broken) maxwell
legalizing code.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
This lets us stop passing liveness information into the per-op
legalization code. Long-term, I want to add a more general core
concept of destinations which are also reads but I haven't gotten
around to that yet.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
Instead of scattering number checks everywhere, this lets us actually
start splitting code paths. This commit just adds the shader model
trait. Later commits will add more methods.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
It's only needed for one Kepler+ check which is unlikely to ever be
relevant for NAK. Also, that should probably be based on the SPH
version or something, not an arbitrary shader model.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
Handle '\n' when inside the MSGDESC start condition,
otherwise the lexer would apply its default rule (write
to stdout).
Without that, newlines were "leaking" to the output when
parsing a multiple line "MsgDesc". E.g. given the file
example.asm below
```
send(8) nullUD g126UD nullUD 0x02000000 0x00000000
thread_spawner MsgDesc: mlen 1 ex_mlen 0 rlen 0
{ align1 WE_all 1Q @1 EOT };
```
the assembler would produce one extra newline
```
$ brw_asm -t hex -g tgl example.asm
31 01 03 80 04 00 00 00 0c 7e 00 70 00 00 00 00
```
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30100>
this is useful for evaluating compute shaders with zink. the open shader-db
doesn't have any compute shaders in it, but shader-db runner is capable of
compute and we need to handle it. (Rob's shaderdb definitely has some compute
shaders in it, at least.)
this gets us pipeline stats printing on zink+nvk for a simple compute shader I wrote when working on common NIR stuff:
b.shader_test - type: compute, Code Size: 752, Number of GPRs: 19, SLM Size: 0
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30135>
Valid values are "default" and integers from 1 to 12 (bpc).
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813>
Add support for the gallium interface to retrieve supported bitrates
and modifiers and creation of a compressed resource.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813>
Add some util methods to be able to translate from an AFRC modifier
to the associated compression bitrate (bits-per-components) and
vice-versa. Also add a method to query all the supported compression
bitrate for a format.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813>
Add support for all three block sizes (16, 24 and 32) and two
paging tiles layout (rotation or scan optimized). The size of the
resource is aligned to the paging tile width and height.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813>
v10 restricts component orders when AFRC is in use, so we use the
same solution as for AFBC on v7.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813>
There are mainly two parameters to control the fixed-rate
compression:
- Block size: the size (16, 24 or 32 bytes) that will take a
coding unit (format dependent).
- AFRC format: the pixel format and paging tile layout
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813>
As of now, only Mali-G310 supports ARM fixed-rate compression but
it should be advertised in bit 25 of TEXTURE_FEATURES_0
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813>
This feature should be enabled for use cases when the lowest encoding
latency is desired, such as real-time game streaming.
Disabled by default due to increased power usage.
There is no libva interface currently that could be used for this, so
for now it can only be enabled by setting AMD_DEBUG=lowlatencyenc
environment variable.
See: https://gitlab.freedesktop.org/drm/amd/-/issues/3336
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30039>
The function handles the Xe2 case where NibCtrl is gone. Also add
error messages for invalid input when assembling for Xe2, e.g. "2N".
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30060>
