intel/brw: Use brw_inst_set_group() to set QtrCtrl and NibCtrl

The function handles the Xe2 case where NibCtrl is gone.  Also add
error messages for invalid input when assembling for Xe2, e.g. "2N".

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30060>
This commit is contained in:
Caio Oliveira 2024-07-06 15:31:57 -07:00 committed by Marge Bot
parent c3c65e8821
commit 6cdd56e7ed
2 changed files with 47 additions and 104 deletions

View file

@ -67,6 +67,7 @@ struct predicate {
enum instoption_type {
INSTOPTION_FLAG,
INSTOPTION_DEP_INFO,
INSTOPTION_CHAN_OFFSET,
};
struct instoption {
@ -78,6 +79,7 @@ struct instoption {
};
struct options {
uint8_t chan_offset;
unsigned access_mode:1;
unsigned compression_control:2;
unsigned thread_control:2;
@ -88,8 +90,6 @@ struct options {
unsigned acc_wr_control:1;
unsigned end_of_thread:1;
unsigned compaction:1;
unsigned qtr_ctrl:2;
unsigned nib_ctrl:1;
unsigned is_compr:1;
struct tgl_swsb depinfo;
};

View file

@ -559,6 +559,10 @@ add_instruction_option(struct options *options, struct instoption opt)
}
return;
}
if (opt.type == INSTOPTION_CHAN_OFFSET) {
options->chan_offset = opt.uint_value;
return;
}
switch (opt.uint_value) {
case ALIGN1:
options->access_mode = BRW_ALIGN_1;
@ -596,46 +600,6 @@ add_instruction_option(struct options *options, struct instoption opt)
case EOT:
options->end_of_thread = true;
break;
/* TODO : Figure out how to set instruction group and get rid of
* code below
*/
case QTR_2Q:
options->qtr_ctrl = BRW_COMPRESSION_2NDHALF;
break;
case QTR_3Q:
options->qtr_ctrl = BRW_COMPRESSION_COMPRESSED;
break;
case QTR_4Q:
options->qtr_ctrl = 3;
break;
case QTR_2H:
options->qtr_ctrl = BRW_COMPRESSION_COMPRESSED;
break;
case QTR_2N:
options->qtr_ctrl = BRW_COMPRESSION_NONE;
options->nib_ctrl = true;
break;
case QTR_3N:
options->qtr_ctrl = BRW_COMPRESSION_2NDHALF;
break;
case QTR_4N:
options->qtr_ctrl = BRW_COMPRESSION_2NDHALF;
options->nib_ctrl = true;
break;
case QTR_5N:
options->qtr_ctrl = BRW_COMPRESSION_COMPRESSED;
break;
case QTR_6N:
options->qtr_ctrl = BRW_COMPRESSION_COMPRESSED;
options->nib_ctrl = true;
break;
case QTR_7N:
options->qtr_ctrl = 3;
break;
case QTR_8N:
options->qtr_ctrl = 3;
options->nib_ctrl = true;
break;
}
}
}
@ -710,12 +674,7 @@ unaryinstruction:
}
brw_inst_set_saturate(p->devinfo, brw_last_inst, $3);
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5);
// TODO: set instruction group instead of qtr and nib ctrl
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$8.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$8.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $8.chan_offset);
}
;
@ -754,12 +713,7 @@ binaryinstruction:
brw_inst_set_saturate(p->devinfo, brw_last_inst, $3);
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5);
// TODO: set instruction group instead of qtr and nib ctrl
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$9.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$9.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset);
brw_pop_insn_state(p);
}
@ -804,12 +758,7 @@ binaryaccinstruction:
brw_inst_set_saturate(p->devinfo, brw_last_inst, $3);
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5);
// TODO: set instruction group instead of qtr and nib ctrl
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$9.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$9.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset);
}
;
@ -836,13 +785,7 @@ mathinstruction:
i965_asm_set_instruction_options(p, $9);
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5);
brw_inst_set_saturate(p->devinfo, brw_last_inst, $3);
// TODO: set instruction group instead
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$9.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$9.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset);
brw_pop_insn_state(p);
}
;
@ -893,12 +836,7 @@ ternaryinstruction:
brw_inst_set_saturate(p->devinfo, brw_last_inst, $3);
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5);
// TODO: set instruction group instead of qtr and nib ctrl
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$10.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$10.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $10.chan_offset);
}
;
@ -945,12 +883,7 @@ sendinstruction:
BRW_TYPE_UD);
brw_inst_set_sfid(p->devinfo, brw_last_inst, $7);
brw_inst_set_eot(p->devinfo, brw_last_inst, $9.end_of_thread);
// TODO: set instruction group instead of qtr and nib ctrl
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$9.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$9.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset);
brw_pop_insn_state(p);
}
@ -965,12 +898,7 @@ sendinstruction:
brw_inst_set_bits(brw_last_inst, 127, 96, $7);
brw_inst_set_sfid(p->devinfo, brw_last_inst, $8);
brw_inst_set_eot(p->devinfo, brw_last_inst, $10.end_of_thread);
// TODO: set instruction group instead of qtr and nib ctrl
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$10.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$10.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $10.chan_offset);
brw_pop_insn_state(p);
}
@ -999,12 +927,7 @@ sendinstruction:
brw_inst_set_sfid(p->devinfo, brw_last_inst, $9);
brw_inst_set_eot(p->devinfo, brw_last_inst, $11.end_of_thread);
// TODO: set instruction group instead of qtr and nib ctrl
brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
$11.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst,
$11.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $11.chan_offset);
if (p->devinfo->verx10 >= 125 && $10.ex_bso) {
brw_inst_set_send_ex_bso(p->devinfo, brw_last_inst, 1);
@ -1245,8 +1168,7 @@ syncinstruction:
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $4);
brw_set_src0(p, brw_last_inst, $5);
brw_inst_set_eot(p->devinfo, brw_last_inst, $6.end_of_thread);
brw_inst_set_qtr_control(p->devinfo, brw_last_inst, $6.qtr_ctrl);
brw_inst_set_nib_control(p->devinfo, brw_last_inst, $6.nib_ctrl);
brw_inst_set_group(p->devinfo, brw_last_inst, $6.chan_offset);
brw_pop_insn_state(p);
}
@ -2162,17 +2084,38 @@ instoption:
| ATOMIC { $$.type = INSTOPTION_FLAG; $$.uint_value = ATOMIC; }
| CMPTCTRL { $$.type = INSTOPTION_FLAG; $$.uint_value = CMPTCTRL; }
| WECTRL { $$.type = INSTOPTION_FLAG; $$.uint_value = WECTRL; }
| QTR_2Q { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_2Q; }
| QTR_3Q { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_3Q; }
| QTR_4Q { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_4Q; }
| QTR_2H { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_2H; }
| QTR_2N { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_2N; }
| QTR_3N { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_3N; }
| QTR_4N { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_4N; }
| QTR_5N { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_5N; }
| QTR_6N { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_6N; }
| QTR_7N { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_7N; }
| QTR_8N { $$.type = INSTOPTION_FLAG; $$.uint_value = QTR_8N; }
| QTR_2Q { $$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 8; }
| QTR_3Q { $$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 16; }
| QTR_4Q { $$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 24; }
| QTR_2H { $$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 16; }
| QTR_2N
{
if (p->devinfo->ver >= 20)
error(&@1, "Channel offset must be multiple of 8 in Xe2+\n");
$$.type = INSTOPTION_CHAN_OFFSET;
$$.uint_value = 4;
}
| QTR_3N { $$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 8; }
| QTR_4N
{
if (p->devinfo->ver >= 20)
error(&@1, "Channel offset must be multiple of 8 in Xe2+\n");
$$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 12;
}
| QTR_5N { $$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 16; }
| QTR_6N
{
if (p->devinfo->ver >= 20)
error(&@1, "Channel offset must be multiple of 8 in Xe2+\n");
$$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 20;
}
| QTR_7N { $$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 24; }
| QTR_8N
{
if (p->devinfo->ver >= 20)
error(&@1, "Channel offset must be multiple of 8 in Xe2+\n");
$$.type = INSTOPTION_CHAN_OFFSET; $$.uint_value = 28;
}
| depinfo { $$.type = INSTOPTION_DEP_INFO; $$.depinfo_value = $1; }
;