In addition to the general predicates, add wrappers to set
and get the SBID, since they are in the extra struct of
each instruction. This is a preparation for adding DPAS.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41913>
We now require kernel side CPU queue support (introduced via
DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE). If the underlying kernel lacks
this support i.e. is older than kernel 6.8, physical device
initialization will now fail.
With this requirement guaranteed, we can remove the userspace
fallback paths that manually managed and stalled on indirect
CSD dispatches and query resets.
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42087>
After commit 16c96b0e93 ("v3dv: drop single sync kernel interface"), we
no longer use V3DV_QUEUE_ANY. Therefore, drop it and also remove the
legacy comments about single-sync support.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42119>
They cause random kernel NULL pointer dereferences. Seems pretty
recent but skipping them is definitely more reliable.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42123>
It is possible for isl_mod_info to be NULL if no drm modifier was
given, layout transition on external queue can hit this condition.
Fixes: 11f8f333e2 ("anv: set a private binding when the image is not externally shared")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42015>
Halt needs to be always in pair. First halt issued will mask off active
channels and second one will basically re-enable those masked off
channels.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42067>
Using multiple `MTL4Compiler` instances concurrently may result in
the process crashing from within the Metal driver. Work around this
by maintaining one `MTL4Compiler` per `MTLDevice`.
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41842>
Enables using new features that are only available with Metal 4 pipelines,
and fixes Metal validation errors from depth/stencil format mismatches
between pipeline and render pass attachments due to differences in strictness
between Metal and Vulkan.
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41842>
Lowerings like ensuring correct point size outputs, vertex position
output, and clip space control are expected to happen on the shader
stage which becomes the vertex stage on the actual hardware.
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42020>
After LLVM APInt's refactor, stricter checks for
integer signedness are imposed. If a sign extended
uint64_t is passed to LLVMConstInt(...) producing
a value much larger than uintNmax for N < 64,
then LLVM complains.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41822>
Refer changes made to AMDGPU backend of llvm-project
in commit 4b1cfc5d7c606ece125d1e0ef6d13e0289553200
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41822>
Guard external texture lowering by !nir_tex_instr_is_query(), matching
the pattern already used by swizzle_result and lower_srgb.
Fixes textureSize() on samplerExternalOES on panfrost, which triggers
the assertion:
```
Invalid invariant idx.type == BI_INDEX_REGISTER:
r10 = TEX_SINGLE.rgb.2d.f32.zero_lod _.h00, ^r10, ^r11, sr_count:0
```
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41454>
Soon we'll parse the options earlier where we don't target a specific
device yet, so we need to be able to generate the clang arguments on the
fly after parsing.
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
The CString Debug implementation does not handle new lines, so it gets all
printed as a single row, which is not what we want at all.
Fixes: 01de0ff26f ("rusticl/program: store log as a CString")
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
This will save us the trouble of faking constant folding for the BVH level and
trace ray control values when we lower this intrinsic in the new backends.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
Add a script to run whatever you want under drm-shim given only a driver name,
CI job name or GPU model, plus the option to dump assembly with a common option.
This lets people debugging common code easily run shader-db or whatever with
whatever they want without needing to look up a million driver specific
options/paths/etc.
Must run inside a meson devenv. Example usage (path symlinked):
drm-shim --disasm glk ./run shaders/glmark/1-1.shader_test
drm-shim --disasm asahi ./run shaders/glmark/1-1.shader_test
drm-shim --disasm panfrost-t860 ./run shaders/glmark/1-1.shader_test
drm-shim --disasm zink-radv-navi31-valve ./run shaders/glmark/1-1.shader_test
Makes for a fun compilerexplorer like tool too
Reduces amount of docs needed for https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41959
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42055>
