Commit graph

141900 commits

Author SHA1 Message Date
Sagar Ghuge
07a4bdf1e8 intel/fs: Lower A64 byte scattered r/w messages to LSC dataport
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Mark Janes
22d20dbb02 intel/fs: Lower A64 untyped r/w messages to LSC when available
We set the ex_desc to 0, since the address surface type is FLAT.

v2 (Sagar Ghuge):
 - Fix message descriptor encoding

v2 (Jason Ekstrand):
 - Drop support for block messages

Co-authored-by: Sagar Ghuge <sagar.ghuge@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Sagar Ghuge
621cf9b1df intel/fs: Lower Byte scattered r/w messages to LSC when available
v2 (Jason Ekstrand):
 - Squash in brw_scheduler changes
 - Update brw_ir_performance

Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Sagar Ghuge
8f82c8aa1a intel/fs: Lower untyped float atomic messages to LSC when available
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Mark Janes
bd40a1e8c9 intel/fs: Lower untyped atomic messages to LSC when available
Bspec programming note metions that "Atomic messages are always forced
to "un-cacheable" in the L1 cache". We can make the L1 cache
un-cacheable and L3 with write-back policy.

v2: (Sagar Ghuge):
 - Fix caching policy for atomic messages
 - Fix simd exec size

v3: (Sagar Ghuge):
 - Add atomic messages to brw_schedule_instructions

v4: (Jason Ekstrand):
 - Rebase on lsc_msg_desc reworks

Co-authored-by: Sagar Ghuge <sagar.ghuge@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Mark Janes
4f86a70599 intel/fs: Lower DW untyped r/w messages to LSC when available
This puts the basic infrastructure in place for lowering logical
dataport messages to LSC messages.  We start with the two most obvious
opcodes and add more in later patches.

v2 (Sagar Ghuge):
 - Pass required params to message desc
 - Remove duplicate mlen calculation
 - Change commit message.

v3 (Jason Ekstrand):
 - Drop TGM support

Co-authored-by: Jason Ekstrand <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Mark Janes
32ec0662fd intel/compiler: Add LSC messages to brw_schedule_instructions
v2 (Jason Ekstrand):
 - Use lsc_msg_desc_opcode()
 - Drop all opcodes for now and add them in later patches.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Jason Ekstrand
8d3468ad5b intel/compiler: Add LSC to messages brw_ir_performance
This adds framework only.  No opcodes.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Sagar Ghuge
634925694d intel/disasm: Disassemble LSC message extended descriptors
v2 (Mark Janes):
 - changed to lsc convention

v3 (Jason Ekstrand):
 - Use lsc_msg_desc_addr_type

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Sagar Ghuge
2605727a80 intel/disasm: Disassmeble LSC messages
v2 (Jordan Justen):
 - Use PRIu64

v3 (Jason Ekstrand):
 - Drop ranged fence ops, Jason

v4: (Mark Janes)
 - fixed missing parameter to brw_message_desc_cmask_or_vector
 - changed to use lsc methods to extract fields

v5 (Jason Ekstrand):
 - Squash original disassembler patch and fixes togetherk
 - Use lsc_opcode_has_cmask
 - Prefix atomic ops with "atomic_"

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Mark Janes
f5541cd4e9 intel/compiler: Add getter helpers for LSC message descriptor fields
v2: (Sagar Ghuge):
 - rename addr_reg_size to src0_len to match with bspec

v3 (Jason Ekstrand):
 - Re-arrange things in increasing bit order

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Sagar Ghuge
4ff00194b7 intel/compiler: Add helpers for LSC message descriptors
v2 (Jason Ekstrand):
 - Squash all the similar patches together
 - Re-arrange and rename some things to be more consistent
 - Add a lsc_opcode_has_cmask helper
 - Drop is_one_addr_reg

v3 (Jason Ekstrand):
 - Add transpose
 - Re-order arguments to make more logical sense
 - Switch from `write` to `has_dest`

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Sagar Ghuge
b67f1ff465 intel/compiler: Add support for LSC fence operations
v2 (Jason Ekstrand):
 - Squash SLM and global fence ops together

v3 (Jason Ekstrand):
 - Rework to use message descriptors instead of instruction fields

v4 (Jason Ekstrand):
 - Don't pass BTI into back-end emit function.  Always use FLAT.

Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Sagar Ghuge
cf612e4dc1 intel/compiler: Define new LSC data port encodings
Xe-HPG comes with a massively reworked dataport.  The new thing, called
Load/Store Cache or LSC, has a significantly improved interface.
Instead of bespoke messages for every case, there's basically one or two
messages with different bits to control things like address size, how
much data is read/written, etc.  It's way nicer but also means we get to
rewrite all our dataport encoding/decoding code.  This patch kicks off
the party with all of the new enums.

v2 (Jason Ekstrand, Mark Janes):
 - Rename to LSC

v3 (Jason Ekstrand):
 - Add numbers to all enums

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
Jason Ekstrand
4a85a5e09f intel/devinfo: Add a has_lsc bit
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
2021-06-30 16:17:18 +00:00
SureshGuttula
52602452ab radeon/vcn: calc_dpb_size should be based on dpb_type
This patch will fix the dpb size calculated for each dpb_type.
Current implementaion always calculating based on DPB_MAX_RES.To fix
this dpb_type should be decided before calc_dpb_size.

Signed-off-by: SureshGuttula <suresh.guttula@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11633>
2021-06-30 14:22:37 +00:00
Mike Blumenkrantz
c0397a42ce radv: pre-calc vertex buffer descriptor size on pipeline object
util_bitcount has a nonzero cost, and calling it like this in a hotpath
generates unnecessary overhead

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11525>
2021-06-30 13:42:42 +00:00
Mike Blumenkrantz
936c21d376 zink: attempt to handle some resource unmap cases in 32bit envs
address space is limited here, so in some cases it's worthwhile to
unmap resources

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
2021-06-30 13:07:57 +00:00
Mike Blumenkrantz
9d599ed417 zink: cache visible vram
yolo

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
2021-06-30 13:07:57 +00:00
Mike Blumenkrantz
d4a7b4fef8 zink: uncap mem caching
if it fits, it sits

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
2021-06-30 13:07:57 +00:00
Mike Blumenkrantz
778f325c67 zink: make mem cache limits dynamically scalable
this removes the hardcoded count of 5 mem blocks to cache and replaces
it with a value that's based on the number of allocations seen

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
2021-06-30 13:07:57 +00:00
Mike Blumenkrantz
252afe405f zink: don't align device-local buffer memory
this can't be mapped

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
2021-06-30 13:07:57 +00:00
Mike Blumenkrantz
93e8494007 zink: try for better buffer allocation heaps
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
2021-06-30 13:07:57 +00:00
Gert Wollny
34cb401791 r600/sfn: initialize all texture lower options
Fixes: d1edf3cdf2
    r600/sfn: Lower offset in TXF instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11650>
2021-06-30 09:12:47 +00:00
Marcin Ślusarz
7048a15485 anv: drop unused argument of anv_descriptor_set_address
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11577>
2021-06-30 08:41:41 +00:00
Marcin Ślusarz
904bd8f358 anv: handle push descriptor sets when they are sent with push constants
When vkCmdPushDescriptorSetKHR is used, the descriptor set is allocated
internally without belonging to any pool. Such descriptor set will be
visible on the GPU side because it's a part of the dynamic state stream,
but we still have to store its address in the array of descriptor sets.

Complements: 379b9bb7b0 ("anv: Support fetching descriptor addresses from push constants")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11577>
2021-06-30 08:41:41 +00:00
Marcin Ślusarz
79a50c6f54 anv: keep descriptor set's address directly in anv_descriptor_set
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11577>
2021-06-30 08:41:41 +00:00
Timothy Arceri
f58e6fee74 util/disk_cache: delete more cache items in one go when full
Currently the cache just deletes enough items when the cache is
full to make room for the new item being stored. This hasn't
been too much of a problem in practice but for things like running
piglit where we have thousands of unique shaders and all threads
being utilised we end up with a pretty big bottle neck.

With this change rather than just brute forcing our way to having
enough room for the new item, we instead grab 10% of the least
recently used items in the random directory we chose and delete
them all. This should only be around 0.04% of total cache items
but should hopefully releave some of the pressure on system calls
like fstatat().

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11523>
2021-06-30 07:44:44 +00:00
Daniel Stone
e4f762ac34 CI: Disable LAVA devices for maintenance
LAVA will be unavailable for probably most of the day today due to
scheduled maintenance; doing some spring cleaning to upgrade to a new
version, clean out the database, etc.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11649>
2021-06-30 06:53:45 +00:00
Samuel Pitoiset
2019014df9 radv: fix fd leak in vkAcquireImageANDROID()
Copied from ANV.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4915
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11518>
2021-06-30 08:14:03 +02:00
Simon Ser
fc667fdf3b vulkan/wsi: prefer the Wayland linux-dmabuf protocol
When the linux-dmabuf protocol is available, prefer it over the old
wl_drm protocol. Previously wl_drm was used when modifiers aren't
supported, however linux-dmabuf supports formats without modifiers too.
In this case, linux-dmabuf will send a DRM_FORMAT_MOD_INVALID modifier
for each supported format [1].

All of this allows compositors to better handle these buffers, getting a
DMA-BUF and implementing features like direct scan-out.

A similar logic has been implemented for EGL [2].

In this patch, we bind to linux-dmabuf even if the driver doesn't support
modifiers. In this case the formats advertised by the compositor will
still be added to the display->dmabuf.formats list.

In wsi_wl_image_init, drop the assertions that display->drm_wrapper and
display->dmabuf.wl_dmabuf can't be both present. If the driver doesn't
support modifiers, the modifier is already set to DRM_FORMAT_MOD_INVALID.
If the parent compositor doesn't support modifiers, the modifiers list
passed to wsi_create_native_image will be empty, and the common code
will ensure that the image's modifier is set to DRM_FORMAT_MOD_INVALID.

In wsi_wl_surface_create_swapchain, create the wl_proxy proxy if we've
bound to it earlier. Don't decide to create the proxy depending on the
number of supported modifiers.

[1]: fb9b2a8731
[2]: c376865f5e

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4942>
2021-06-30 04:48:19 +00:00
Simon Ser
14f0c0d9db vulkan/wsi: unify format logic in dmabuf_handle_modifier
This function has a switch which currently duplicates the format
handling logic.

Move this logic out of the switch.

This avoids repeating the same code for each supported format and
prepares the work for proper DRM_FORMAT_MOD_INVALID handling.

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4942>
2021-06-30 04:48:19 +00:00
Mike Blumenkrantz
63df413f95 zink: split dummy buffer creation and populate
populate requires the queue to be set up, but the resources must be created
before descriptor init

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11591>
2021-06-30 04:38:10 +00:00
Mike Blumenkrantz
eade6b75c2 zink: add direct conversion from pipe_shader_type->VkPipelineStageFlags
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11592>
2021-06-30 04:25:03 +00:00
Dave Airlie
a56f364ea9 crocus: disable Z16 unorm textures on pre-gen8 as well.
This fixes:
dEQP-GLES3.functional.fbo.completeness.renderable.texture.depth.depth_component_unsigned_short

as gallium will try an allocate a DS usage, but fallback to just
a sampling usage if that fails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11646>
2021-06-30 00:53:55 +00:00
Dave Airlie
783dcd0634 crocus/gen8: add back z16 support for gen8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11646>
2021-06-30 00:53:55 +00:00
Rob Clark
140ce4f8ed freedreno+ir3: Enable INT16
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11545>
2021-06-29 23:27:28 +00:00
Rob Clark
c7b935962b nir: Add pass to lower phi precision
In addition to register pressure benefits from getting more fp16/int16,
this avoids i2imp's from standing in the way of loop unrolling.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11545>
2021-06-29 23:27:28 +00:00
Enrico Galli
ddad83fc97 microsoft/compiler: Add support for get_ssbo_size to translator
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11629>
2021-06-29 23:15:28 +00:00
Thomas H.P. Andersen
b4369de27f nir/lower_packing: use shader_instructions_pass
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11615>
2021-06-29 22:08:29 +00:00
Thomas H.P. Andersen
ed530ac6c2 nir: return progress from nir_lower_packing
Compiling with clang warns about an unused variable in
nir_lower_packing.

Tracking progress was added to nir_lower_packing in
adb157ddfd but the function
will ignore the progress from impl calls and always return
false.

This patch changes it to return the progress. It fixes the
warning and should enable validation calls in NIR_PASS when
progress is made.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: adb157ddfd "nir: Return progress from nir_lower_64bit_pack()"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11615>
2021-06-29 22:08:29 +00:00
Pierre-Eric Pelloux-Prayer
a92dcc4966 radeonsi/driconf: add workaround for SpaceEngine
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4483
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Pierre-Eric Pelloux-Prayer
c564841fae ac/surface: don't print stencil info if tex has no stencil
color/zs are stored in a union so testing for zs.stencil_offset
isn't the correct way to test for stencil.

Fixes: 988f148db3 ("ac/surface: overlap color and Z/S fields using a union in gfx9_surf_layout")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Pierre-Eric Pelloux-Prayer
822f377736 radeonsi/gfx7: always sync pfp/me
Workaround for https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764

Fixes: c5326164 ("radeonsi: add SI_CONTEXT_PFP_SYNC_ME to skip syncing PFP for image operations")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Pierre-Eric Pelloux-Prayer
b72c7c6c56 radeonsi: fix fb_too_small condition
fb->num_layers can be 0 so use util_num_layers(tex) instead.

Fixes: f7c58559f5 ("radeonsi: refine fast clears for small buffers, always use them for large HTILE")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Pierre-Eric Pelloux-Prayer
b564ec7769 ac/llvm: call the callback in all return paths of ac_cull_triangle
Fixes: 12d2df15f1 ("ac/llvm: add a callback to ac_cull_triangle to generate code in inner-most block")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4959
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Christian Gmeiner
017d6cc642 ci: bare-metal: drop webdav support
The NFS method is much faster.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11611>
2021-06-29 18:37:55 +00:00
Jason Ekstrand
dd890f520e iris/bufmgr: Stop changing mapping modes on buffers
With discrete GPUs, we aren't able to change mapping modes after we've
created a buffer.  This is a limitation of TTM.  However, we already
have a buffer cache and it's pretty likely that stuff in any given
memzone will end up with just the one mapping type anyway so this
shouldn't have much of a cost.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11583>
2021-06-29 17:03:25 +00:00
Emma Anholt
b18cf54f0d intel: Early exit from inst_is_in_block().
Surely the compiler would sort that out, you would think.  But no, my
debugoptimized build improves
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.13 runtime by 25%
on my SKL from this change.

This was the slowest test in the GLES31 tests on APL in CI, at 22s.  And
yes, we were spending around half of our runtime in this function.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11631>
2021-06-29 16:48:40 +00:00
Gert Wollny
3a9716e6b1 virgl: Enable ASTC formats also for 3D textures
The texture compression can also be used for 2D arrays and
3D textures.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11634>
2021-06-29 16:14:43 +02:00