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radeonsi: fix fb_too_small condition

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fb->num_layers can be 0 so use util_num_layers(tex) instead.

Fixes: f7c58559f5 ("radeonsi: refine fast clears for small buffers, always use them for large HTILE")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2021-06-21 15:11:27 +02:00
parent b564ec7769
commit b72c7c6c56
1 changed files with 3 additions and 1 deletions
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4
src/gallium/drivers/radeonsi/si_clear.c
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@ -541,7 +541,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
struct si_clear_info info[8 * 2 + 1]; /* MRTs * (CMASK + DCC) + ZS */
unsigned num_clears = 0;
unsigned clear_types = 0;
bool fb_too_small = fb->width * fb->height * fb->layers <= 512 * 512;
unsigned num_pixels = fb->width * fb->height;
/* This function is broken in BE, so just disable this path for now */
#if UTIL_ARCH_BIG_ENDIAN
@ -595,6 +595,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
*
* This helps on both dGPUs and APUs, even small APUs like Mullins.
*/
bool fb_too_small = num_pixels * num_layers <= 512 * 512;
bool too_small = tex->buffer.b.b.nr_samples <= 1 && fb_too_small;
bool eliminate_needed = false;
bool fmask_decompress_needed = false;
@ -768,6 +769,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
unsigned level = zsbuf->u.tex.level;
bool update_db_depth_clear = false;
bool update_db_stencil_clear = false;
bool fb_too_small = num_pixels * zs_num_layers <= 512 * 512;
/* Transition from TC-incompatible to TC-compatible HTILE if requested. */
if (zstex->enable_tc_compatible_htile_next_clear) {