Commit graph

14796 commits

Author SHA1 Message Date
Ian Romanick
073ffceef6 elk: Enable saturating float to integer conversion opcodes
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37186>
2025-10-10 17:25:06 +00:00
Ian Romanick
65e8220180 brw: Enable saturating float to integer conversion opcodes
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37186>
2025-10-10 17:25:06 +00:00
Lionel Landwerlin
b8ae4ede60 brw: add serialize send stats
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37394>
2025-10-10 11:19:39 +00:00
Lionel Landwerlin
37a9c5411f brw: serialize messages on Gfx12.x if required
The Intel EU fusion feature needs to be disabled on SEND messages
where either the texture handle, sampler handle, sampler header is not
identical on fused threads.

This is the case in particular with accesses on non-uniform
texture/sampler handles but could also strike with dynamic
programmable offsets (currently disabled).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37394>
2025-10-10 11:19:39 +00:00
Kenneth Graunke
dd9e002129 brw: Fix mesh shader asserts in clip/cull distance setting
mesh doesn't use brw_vue_prog_data.  Also, I had been catching TCS
shaders here, and shouldn't.

Fixes: bf76e86bc8 ("brw: Refactor clip/cull distance mask setting into a helper")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37809>
2025-10-10 09:51:26 +00:00
Lionel Landwerlin
196c7903b9 anv: fix companion usage for emulated image
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
We need to return true if we need the companion batch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e60416b4e4 ("anv: use companion batch for operations with HIZ/STC_CCS destination")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37797>
2025-10-09 21:38:33 +00:00
Kenneth Graunke
bb096b0f12 brw: Use BITFIELD_{MASK,RANGE} in clip/cull distance mask handling code
Suggested by Alyssa.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37784>
2025-10-09 13:20:04 -07:00
Kenneth Graunke
bf76e86bc8 brw: Refactor clip/cull distance mask setting into a helper
This was copy pasted between 4 different stages.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37784>
2025-10-09 13:20:03 -07:00
Kenneth Graunke
b3c511592a brw: Replace type_size_xvec4 with glsl_count_attribute_slots
This is nearly identical, except for bindless sampler/texture/image
handling.  But we only use it for inputs/outputs, not uniforms, where
there are no bindless handles to worry about.

Deletes a lot of mostly-duplicated code.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37784>
2025-10-09 13:20:00 -07:00
Kenneth Graunke
a12f117cef brw: Stop using type_size_dvec4 for fragment shader outputs
There are no 64-bit renderable formats so we can't have FS outputs that
are dvecs.  This dates back to 2016 and a ton of the backend has been
rewritten, so I think whatever this was trying to solve is no longer a
problem.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37784>
2025-10-09 13:19:56 -07:00
Lucas Fryzek
3a124ac82a anv: Enable VK_ANDROID_external_format_resolve
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177>
2025-10-09 18:42:13 +00:00
Lucas Fryzek
eb70d66228 anv: Add external format resolve operation using blorp
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177>
2025-10-09 18:42:13 +00:00
Lucas Fryzek
bbcafa630f anv: Modify anv feature (dis)enable code to match other drivers
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177>
2025-10-09 18:42:13 +00:00
Lucas Fryzek
1b333251c4 anv: Enable R10X6 & R10X6G10X6 unorm formats
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177>
2025-10-09 18:42:13 +00:00
Lucas Fryzek
232f8c42f7 anv: Assert that we only import ahb image with one layer
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177>
2025-10-09 18:42:13 +00:00
Alyssa Rosenzweig
ee671cf4f7 intel/nir_blockify_uniform_loads: use helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753>
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
6b006db492 brw/nir_lower_storage_image: use helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753>
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
e3b6440b39 brw/nir_lower_shader_calls: use helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753>
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
ec8ed69131 brw/nir_lower_sample_index_in_coord: use helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753>
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
544a739abc brw/nir_lower_fs_barycentrics: avoid nir_def_rewrite_uses_after
replace is preferred when appropriate & should be faster. after is when
you use the result in your lowering itself.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753>
2025-10-09 09:50:19 -04:00
Alyssa Rosenzweig
4fe8c19862 brw/nir_lower_alpha_to_coverage: eliminate goto
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753>
2025-10-09 09:50:19 -04:00
Kenneth Graunke
73cbb35442 brw: Move into a new src/intel/compiler/brw subdirectory
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This keeps the directory structure a bit more organized:
- brw specific code
- elk specific code
- common NIR passes that could be used in both places

It also means that you can now 'git grep' in the brw directory without
finding a bunch of elk code, or having to "grep thing b*".

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:47 +00:00
Kenneth Graunke
d1b0597213 brw: Drop compiler/ from brw includes
They're in the current directory/module, just include them.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Kenneth Graunke
af93215b7a intel: Re-unify brw_prim.h and elk_prim.h
These are identical and are just hardware enum values, not related to
the structure of the backend compiler.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Kenneth Graunke
d4c8ca43ef intel: Make a libintel_compiler_nir internal static library
We were compiling these twice, one for brw, one for elk.  There's no
reason to do that, just compile the common code once and link against it
in both backends.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Kenneth Graunke
86aa241c66 brw: Rename brw_nir_trig build target to brw_nir_workarounds
Matches the recent file rename.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Kenneth Graunke
b15b83f43f brw: Drop ir_expression_operation_h from build system
This is from the pre-NIR era where we used GLSL IR expression opcodes
directly.  We haven't done that in years.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Kenneth Graunke
a7c2b87874 intel: Move intel_shader_reloc to common code and drop elk_shader_reloc
We want to be able to emit load_reloc_const_intel intrinsics from common
NIR passes (such as printf lowering).  In order to do that, we need to
have the enum with the meaning of values in common code.  Once you have
that, it's easy to see the (identical) data structures as a way for the
driver to communicate about relocations, rather than a compiler backend
specific thing.  So we move it all up to common code, and re-unify.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Kenneth Graunke
116c65cd3d brw: Rename brw_shader_reloc to intel_shader_reloc
In preparation for moving out of brw to common code.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Kenneth Graunke
b458140b75 elk: Delete ELK_SHADER_RELOC_DESCRIPTORS_ADDR_HIGH
This is leftover brw code that nobody uses.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
2025-10-09 07:01:46 +00:00
Romaric Jodin
cb86341829 meson: remove '--outdir' argument in script
Usage of '--outdir' argument in python scripts makes it very
complicated for tools like ninja-to-soong to generate the Android
equivalent build file.
This is because the option is less clear on what will be generated.

Instead, change it for '--out' where we give the full path of the file
to generate. This has the good point of deduplicating the locations of
the file name to have it only in 'meson.build'.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37741>
2025-10-08 20:51:20 +00:00
Lionel Landwerlin
acf953757e brw: prevent LOAD_REG modifications on MOV_INDIRECT/BROADCAST
Due to those opcode reading variable amount of data in src0, it's not
possible to easily figure out what builder SIMD size should be used to
produce the LOAD_REG replacement.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2d13acf9d9 ("brw: Add passes to generate and lower load_reg")
Fixes: 93996c07e2 ("brw: fix broadcast opcode")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14054
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37756>
2025-10-08 20:17:22 +00:00
José Roberto de Souza
a21b925caa anv: Rename anv_shader_bin to anv_shader_internal
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
It is now only used by internal shaders to the rename make it more clear.

Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749>
2025-10-08 19:58:30 +00:00
José Roberto de Souza
5c8d7c30f5 anv: Simply anv_shader_set_relocs() parameters
Now that we only have one caller for anv_shader_set_relocs() we can simply most
of parameter by struct anv_shader.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749>
2025-10-08 19:58:29 +00:00
José Roberto de Souza
d5b8c7c17e anv: Drop shader relocs from anv_shader_bin_create()
Acording to Lionel anv_shader_bin_create() is only used now for internal shaders
and those don't use relocs so we can drop this lines.

Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749>
2025-10-08 19:58:29 +00:00
José Roberto de Souza
62a746b353 anv: Replace duplicated code set shader relocs by a function
This code was duplicated and with a assert mistake in one of the copies, so
here moving it to function and calling it from both places.

Also I have removed anv_shader_bin_rewrite_embedded_samplers() as it is already
being done in anv_shader_set_relocs().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749>
2025-10-08 19:58:28 +00:00
José Roberto de Souza
379617b77d anv: Define bt_block only in the block that uses it in anv_cmd_buffer_alloc_binding_table()
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:42 +00:00
José Roberto de Souza
d728c97022 anv: Add comment to anv_state->offset
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:42 +00:00
José Roberto de Souza
a90d8fc08e anv/allocator: Subtract start_offset in chunk_offset
anv_state::offset in the context of anv_state_pool is equal to the offset from
the begining of block_pool + start_offset.
Like it is set in anv_state_pool_alloc_no_vg() in the path that allocs a new
block in anv_block_pool.

As anv_state_pool_return_chunk() expects only the offset from the begining of
anv_block_pool so here subtracting to make the path that grabs a larger chunk of
memory of the pool and split into smaler chunks to properly work.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:42 +00:00
José Roberto de Souza
4ca18c09c1 anv/allocator: Don't call anv_block_pool_map() with an offset that includes start_offset
Only 3 pools sets a value different than zero to start_offset so that might be
a issue that was being hidden by luck.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:42 +00:00
José Roberto de Souza
ad62911683 anv/allocator: Change some parameters and variables from 32bit to 64bits
struct anv_state::offset and struct anv_block_pool::max_size are 64bits so these
parameters should also be 64bit or risk overflow.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:41 +00:00
José Roberto de Souza
27074cb48b anv/allocator: Drop uncessary function
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:41 +00:00
José Roberto de Souza
4aee4f0975 anv/allocator: Move definition of ANV_FREE_LIST_EMPTY to anv_allocator
While at it also renaming EMPTY to ANV_FREE_LIST_EMPTY_VAL to be more explicit.
No changes in behavior expected here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:41 +00:00
Lionel Landwerlin
bb5eb9a096 intel/ds: disable draw/blorp tracepoints by default on android
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tim Van Patten <timvp@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740>
2025-10-08 16:00:50 +00:00
Lionel Landwerlin
c4061b96f0 intel/ds: lump all the draw under the same toggle
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tim Van Patten <timvp@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740>
2025-10-08 16:00:50 +00:00
Tapani Pälli
cb822a323f anv/blorp: add missing cs stall on compute pipe control
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37715>
2025-10-08 04:49:27 +00:00
Tapani Pälli
c15b8329fd anv: add cs stall for any pipe control on compute
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37715>
2025-10-08 04:49:27 +00:00
Tapani Pälli
e2697d717f intel/blorp: add restriction for gfx12
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37731>
2025-10-08 04:26:46 +00:00
Iván Briano
a9ea7c542c anv: report maint5::earlyFragment*SampleCounting correctly
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
The HW bug was fixed on Xe2, report so accordingly.

Can test behavior with dEQP-VK.fragment_operations.early_fragment.*_maintenance5

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37730>
2025-10-07 22:21:48 +00:00
Paulo Zanoni
b75e0462ec intel: unify parameters for the exec ioctl retries
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Add the common magic numbers in a header file and make the functions
use them.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00