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intel: Move intel_shader_reloc to common code and drop elk_shader_reloc

Browse source 
We want to be able to emit load_reloc_const_intel intrinsics from common
NIR passes (such as printf lowering).  In order to do that, we need to
have the enum with the meaning of values in common code.  Once you have
that, it's easy to see the (identical) data structures as a way for the
driver to communicate about relocations, rather than a compiler backend
specific thing.  So we move it all up to common code, and re-unify.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>
This commit is contained in:
Kenneth Graunke 2025-10-06 16:11:46 -07:00 • committed by Marge Bot
parent 116c65cd3d
commit a7c2b87874
18 changed files with 111 additions and 163 deletions
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8
src/gallium/drivers/iris/iris_disk_cache.c
View file

@ -157,7 +157,7 @@ iris_disk_cache_store(struct disk_cache *cache,
} else {
#ifdef INTEL_USE_ELK
blob_write_bytes(&blob, elk->relocs,
elk->num_relocs * sizeof(struct elk_shader_reloc));
elk->num_relocs * sizeof(struct intel_shader_reloc));
blob_write_bytes(&blob, elk->param,
elk->nr_params * sizeof(uint32_t));
#else
@ -275,10 +275,10 @@ iris_disk_cache_retrieve(struct iris_screen *screen,
#ifdef INTEL_USE_ELK
elk->relocs = NULL;
if (elk->num_relocs) {
struct elk_shader_reloc *relocs =
ralloc_array(NULL, struct elk_shader_reloc, elk->num_relocs);
struct intel_shader_reloc *relocs =
ralloc_array(NULL, struct intel_shader_reloc, elk->num_relocs);
blob_copy_bytes(&blob, relocs,
elk->num_relocs * sizeof(struct elk_shader_reloc));
elk->num_relocs * sizeof(struct intel_shader_reloc));
elk->relocs = relocs;
}

2
src/gallium/drivers/iris/iris_program.c
View file

@ -1014,7 +1014,7 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo,
assert(IRIS_MEMZONE_SHADER_START >> 32 == 0ull);
nir_def *const_data_addr =
nir_iadd(&b, nir_load_reloc_const_intel(&b, BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW), offset);
nir_iadd(&b, nir_load_reloc_const_intel(&b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW), offset);
nir_def *data =
nir_load_global_constant(&b, nir_u2u64(&b, const_data_addr),

30
src/gallium/drivers/iris/iris_program_cache.c
View file

@ -175,32 +175,22 @@ iris_upload_shader(struct iris_screen *screen,
shader->assembly.offset +
shader->const_data_offset;
struct intel_shader_reloc_value reloc_values[] = {
{
.id = INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW,
.value = shader_data_addr,
},
{
.id = INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
.value = shader_data_addr >> 32,
},
};
if (screen->brw) {
struct intel_shader_reloc_value reloc_values[] = {
{
.id = BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW,
.value = shader_data_addr,
},
{
.id = BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
.value = shader_data_addr >> 32,
},
};
brw_write_shader_relocs(&screen->brw->isa, shader->map,
shader->brw_prog_data, reloc_values,
ARRAY_SIZE(reloc_values));
} else {
#ifdef INTEL_USE_ELK
struct elk_shader_reloc_value reloc_values[] = {
{
.id = BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW,
.value = shader_data_addr,
},
{
.id = BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
.value = shader_data_addr >> 32,
},
};
elk_write_shader_relocs(&screen->elk->isa, shader->map,
shader->elk_prog_data, reloc_values,
ARRAY_SIZE(reloc_values));

4
src/intel/compiler/brw_compiler.c
View file

@ -368,10 +368,10 @@ brw_write_shader_relocs(const struct brw_isa_info *isa,
if (prog_data->relocs[i].id == values[j].id) {
uint32_t value = values[j].value + prog_data->relocs[i].delta;
switch (prog_data->relocs[i].type) {
case BRW_SHADER_RELOC_TYPE_U32:
case INTEL_SHADER_RELOC_TYPE_U32:
*(uint32_t *)dst = value;
break;
case BRW_SHADER_RELOC_TYPE_MOV_IMM:
case INTEL_SHADER_RELOC_TYPE_MOV_IMM:
brw_update_reloc_imm(isa, dst, value);
break;
default:

59
src/intel/compiler/brw_compiler.h
View file

@ -578,65 +578,6 @@ enum brw_param_builtin {
#define BRW_PARAM_BUILTIN_CLIP_PLANE_COMP(param) \
(((param) - BRW_PARAM_BUILTIN_CLIP_PLANE_0_X) & 0x3)
#define BRW_MAX_EMBEDDED_SAMPLERS (4096)
enum intel_shader_reloc_id {
BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW,
BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
BRW_SHADER_RELOC_SHADER_START_OFFSET,
BRW_SHADER_RELOC_RESUME_SBT_ADDR_LOW,
BRW_SHADER_RELOC_RESUME_SBT_ADDR_HIGH,
BRW_SHADER_RELOC_DESCRIPTORS_ADDR_HIGH,
BRW_SHADER_RELOC_DESCRIPTORS_BUFFER_ADDR_HIGH,
BRW_SHADER_RELOC_INSTRUCTION_BASE_ADDR_HIGH,
BRW_SHADER_RELOC_PRINTF_BUFFER_ADDR_LOW,
BRW_SHADER_RELOC_PRINTF_BUFFER_ADDR_HIGH,
BRW_SHADER_RELOC_PRINTF_BUFFER_SIZE,
/* Leave this entry last: */
BRW_SHADER_RELOC_EMBEDDED_SAMPLER_HANDLE,
BRW_SHADER_RELOC_LAST_EMBEDDED_SAMPLER_HANDLE =
BRW_SHADER_RELOC_EMBEDDED_SAMPLER_HANDLE + BRW_MAX_EMBEDDED_SAMPLERS - 1,
};
enum intel_shader_reloc_type {
/** An arbitrary 32-bit value */
BRW_SHADER_RELOC_TYPE_U32,
/** A MOV instruction with an immediate source */
BRW_SHADER_RELOC_TYPE_MOV_IMM,
};
/** Represents a code relocation
*
* Relocatable constants are immediates in the code which we want to be able
* to replace post-compile with the actual value.
*/
struct intel_shader_reloc {
/** The 32-bit ID of the relocatable constant */
uint32_t id;
/** Type of this relocation */
enum intel_shader_reloc_type type;
/** The offset in the shader to the relocated value
*
* For MOV_IMM relocs, this is an offset to the MOV instruction. This
* allows us to do some sanity checking while we update the value.
*/
uint32_t offset;
/** Value to be added to the relocated value before it is written */
uint32_t delta;
};
/** A value to write to a relocation */
struct intel_shader_reloc_value {
/** The 32-bit ID of the relocatable constant */
uint32_t id;
/** The value with which to replace the relocated immediate */
uint32_t value;
};
struct brw_stage_prog_data {
struct brw_ubo_range ubo_ranges[4];

2
src/intel/compiler/brw_eu_emit.c
View file

@ -1948,7 +1948,7 @@ brw_MOV_reloc_imm(struct brw_codegen *p,
assert(brw_type_size_bytes(src_type) == 4);
assert(brw_type_size_bytes(dst.type) == 4);
brw_add_reloc(p, id, BRW_SHADER_RELOC_TYPE_MOV_IMM,
brw_add_reloc(p, id, INTEL_SHADER_RELOC_TYPE_MOV_IMM,
p->next_insn_offset, base);
brw_MOV(p, dst, retype(brw_imm_ud(DEFAULT_PATCH_IMM), src_type));

4
src/intel/compiler/brw_generator.cpp
View file

@ -1562,8 +1562,8 @@ brw_generator::add_resume_sbt(unsigned num_resume_shaders, uint64_t *sbt)
for (unsigned i = 0; i < num_resume_shaders; i++) {
size_t offset = bs_prog_data->resume_sbt_offset + i * sizeof(*sbt);
assert(offset <= UINT32_MAX);
brw_add_reloc(p, BRW_SHADER_RELOC_SHADER_START_OFFSET,
BRW_SHADER_RELOC_TYPE_U32,
brw_add_reloc(p, INTEL_SHADER_RELOC_SHADER_START_OFFSET,
INTEL_SHADER_RELOC_TYPE_U32,
(uint32_t)offset, (uint32_t)sbt[i]);
}
}

6
src/intel/compiler/elk/elk_compiler.c
View file

@ -219,7 +219,7 @@ void
elk_write_shader_relocs(const struct elk_isa_info *isa,
void *program,
const struct elk_stage_prog_data *prog_data,
struct elk_shader_reloc_value *values,
struct intel_shader_reloc_value *values,
unsigned num_values)
{
for (unsigned i = 0; i < prog_data->num_relocs; i++) {
@ -229,10 +229,10 @@ elk_write_shader_relocs(const struct elk_isa_info *isa,
if (prog_data->relocs[i].id == values[j].id) {
uint32_t value = values[j].value + prog_data->relocs[i].delta;
switch (prog_data->relocs[i].type) {
case ELK_SHADER_RELOC_TYPE_U32:
case INTEL_SHADER_RELOC_TYPE_U32:
*(uint32_t *)dst = value;
break;
case ELK_SHADER_RELOC_TYPE_MOV_IMM:
case INTEL_SHADER_RELOC_TYPE_MOV_IMM:
elk_update_reloc_imm(isa, dst, value);
break;
default:

49
src/intel/compiler/elk/elk_compiler.h
View file

@ -656,51 +656,6 @@ enum elk_param_builtin {
#define ELK_PARAM_BUILTIN_CLIP_PLANE_COMP(param) \
(((param) - ELK_PARAM_BUILTIN_CLIP_PLANE_0_X) & 0x3)
enum elk_shader_reloc_id {
ELK_SHADER_RELOC_CONST_DATA_ADDR_LOW,
ELK_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
ELK_SHADER_RELOC_SHADER_START_OFFSET,
};
enum elk_shader_reloc_type {
/** An arbitrary 32-bit value */
ELK_SHADER_RELOC_TYPE_U32,
/** A MOV instruction with an immediate source */
ELK_SHADER_RELOC_TYPE_MOV_IMM,
};
/** Represents a code relocation
*
* Relocatable constants are immediates in the code which we want to be able
* to replace post-compile with the actual value.
*/
struct elk_shader_reloc {
/** The 32-bit ID of the relocatable constant */
uint32_t id;
/** Type of this relocation */
enum elk_shader_reloc_type type;
/** The offset in the shader to the relocated value
*
* For MOV_IMM relocs, this is an offset to the MOV instruction. This
* allows us to do some sanity checking while we update the value.
*/
uint32_t offset;
/** Value to be added to the relocated value before it is written */
uint32_t delta;
};
/** A value to write to a relocation */
struct elk_shader_reloc_value {
/** The 32-bit ID of the relocatable constant */
uint32_t id;
/** The value with which to replace the relocated immediate */
uint32_t value;
};
struct elk_stage_prog_data {
struct elk_ubo_range ubo_ranges[4];
@ -731,7 +686,7 @@ struct elk_stage_prog_data {
unsigned const_data_offset;
unsigned num_relocs;
const struct elk_shader_reloc *relocs;
const struct intel_shader_reloc *relocs;
/** Does this program pull from any UBO or other constant buffers? */
bool has_ubo_pull;
@ -1661,7 +1616,7 @@ void
elk_write_shader_relocs(const struct elk_isa_info *isa,
void *program,
const struct elk_stage_prog_data *prog_data,
struct elk_shader_reloc_value *values,
struct intel_shader_reloc_value *values,
unsigned num_values);
/**

2
src/intel/compiler/elk/elk_eu.c
View file

@ -355,7 +355,7 @@ const unsigned *elk_get_program( struct elk_codegen *p,
return (const unsigned *)p->store;
}
const struct elk_shader_reloc *
const struct intel_shader_reloc *
elk_get_shader_relocs(struct elk_codegen *p, unsigned *num_relocs)
{
*num_relocs = p->num_relocs;

6
src/intel/compiler/elk/elk_eu.h
View file

@ -137,7 +137,7 @@ struct elk_codegen {
int loop_stack_depth;
int loop_stack_array_size;
struct elk_shader_reloc *relocs;
struct intel_shader_reloc *relocs;
int num_relocs;
int reloc_array_size;
};
@ -174,7 +174,7 @@ void elk_init_codegen(const struct elk_isa_info *isa,
bool elk_has_jip(const struct intel_device_info *devinfo, enum elk_opcode opcode);
bool elk_has_uip(const struct intel_device_info *devinfo, enum elk_opcode opcode);
bool elk_has_branch_ctrl(const struct intel_device_info *devinfo, enum elk_opcode opcode);
const struct elk_shader_reloc *elk_get_shader_relocs(struct elk_codegen *p,
const struct intel_shader_reloc *elk_get_shader_relocs(struct elk_codegen *p,
unsigned *num_relocs);
const unsigned *elk_get_program( struct elk_codegen *p, unsigned *sz );
@ -190,7 +190,7 @@ int elk_append_data(struct elk_codegen *p, void *data,
unsigned size, unsigned alignment);
elk_inst *elk_next_insn(struct elk_codegen *p, unsigned opcode);
void elk_add_reloc(struct elk_codegen *p, uint32_t id,
enum elk_shader_reloc_type type,
enum intel_shader_reloc_type type,
uint32_t offset, uint32_t delta);
void elk_set_dest(struct elk_codegen *p, elk_inst *insn, struct elk_reg dest);
void elk_set_src0(struct elk_codegen *p, elk_inst *insn, struct elk_reg reg);

8
src/intel/compiler/elk/elk_eu_emit.c
View file

@ -631,16 +631,16 @@ elk_next_insn(struct elk_codegen *p, unsigned opcode)
void
elk_add_reloc(struct elk_codegen *p, uint32_t id,
enum elk_shader_reloc_type type,
enum intel_shader_reloc_type type,
uint32_t offset, uint32_t delta)
{
if (p->num_relocs + 1 > p->reloc_array_size) {
p->reloc_array_size = MAX2(16, p->reloc_array_size * 2);
p->relocs = reralloc(p->mem_ctx, p->relocs,
struct elk_shader_reloc, p->reloc_array_size);
struct intel_shader_reloc, p->reloc_array_size);
}
p->relocs[p->num_relocs++] = (struct elk_shader_reloc) {
p->relocs[p->num_relocs++] = (struct intel_shader_reloc) {
.id = id,
.type = type,
.offset = offset,
@ -3216,7 +3216,7 @@ elk_MOV_reloc_imm(struct elk_codegen *p,
assert(type_sz(src_type) == 4);
assert(type_sz(dst.type) == 4);
elk_add_reloc(p, id, ELK_SHADER_RELOC_TYPE_MOV_IMM,
elk_add_reloc(p, id, INTEL_SHADER_RELOC_TYPE_MOV_IMM,
p->next_insn_offset, 0);
elk_MOV(p, dst, retype(elk_imm_ud(DEFAULT_PATCH_IMM), src_type));

2
src/intel/compiler/intel_nir_lower_printf.c
View file

@ -22,8 +22,8 @@
*/
#include "intel_nir.h"
#include "intel_shader_enums.h"
#include "compiler/nir/nir_builder.h"
#include "brw_compiler.h"
static bool
lower_printf_intrinsics(nir_builder *b, nir_intrinsic_instr *intrin, void *_)

62
src/intel/compiler/intel_shader_enums.h
View file

@ -589,6 +589,68 @@ intel_fs_msaa_flags(struct intel_fs_params params)
return fs_msaa_flags;
}
#define INTEL_MAX_EMBEDDED_SAMPLERS (4096)
enum intel_shader_reloc_id {
INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW,
INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
INTEL_SHADER_RELOC_SHADER_START_OFFSET,
INTEL_LAST_COMMON_SHADER_RELOC = INTEL_SHADER_RELOC_SHADER_START_OFFSET,
BRW_SHADER_RELOC_RESUME_SBT_ADDR_LOW = INTEL_LAST_COMMON_SHADER_RELOC + 1,
BRW_SHADER_RELOC_RESUME_SBT_ADDR_HIGH,
BRW_SHADER_RELOC_DESCRIPTORS_ADDR_HIGH,
BRW_SHADER_RELOC_DESCRIPTORS_BUFFER_ADDR_HIGH,
BRW_SHADER_RELOC_INSTRUCTION_BASE_ADDR_HIGH,
BRW_SHADER_RELOC_PRINTF_BUFFER_ADDR_LOW,
BRW_SHADER_RELOC_PRINTF_BUFFER_ADDR_HIGH,
BRW_SHADER_RELOC_PRINTF_BUFFER_SIZE,
/* Leave this entry last: */
BRW_SHADER_RELOC_EMBEDDED_SAMPLER_HANDLE,
BRW_SHADER_RELOC_LAST_EMBEDDED_SAMPLER_HANDLE =
BRW_SHADER_RELOC_EMBEDDED_SAMPLER_HANDLE + INTEL_MAX_EMBEDDED_SAMPLERS - 1,
};
enum intel_shader_reloc_type {
/** An arbitrary 32-bit value */
INTEL_SHADER_RELOC_TYPE_U32,
/** A MOV instruction with an immediate source */
INTEL_SHADER_RELOC_TYPE_MOV_IMM,
};
/** Represents a code relocation
*
* Relocatable constants are immediates in the code which we want to be able
* to replace post-compile with the actual value.
*/
struct intel_shader_reloc {
/** The 32-bit ID of the relocatable constant */
uint32_t id;
/** Type of this relocation */
enum intel_shader_reloc_type type;
/** The offset in the shader to the relocated value
*
* For MOV_IMM relocs, this is an offset to the MOV instruction. This
* allows us to do some sanity checking while we update the value.
*/
uint32_t offset;
/** Value to be added to the relocated value before it is written */
uint32_t delta;
};
/** A value to write to a relocation */
struct intel_shader_reloc_value {
/** The 32-bit ID of the relocatable constant */
uint32_t id;
/** The value with which to replace the relocated immediate */
uint32_t value;
};
#ifdef __cplusplus
} /* extern "C" */
#endif

4
src/intel/vulkan/anv_nir_apply_pipeline_layout.c
View file

@ -1905,9 +1905,9 @@ lower_load_constant(nir_builder *b, nir_intrinsic_instr *intrin,
nir_def *const_data_addr = nir_pack_64_2x32_split(b,
nir_iadd(b,
nir_load_reloc_const_intel(b, BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW),
nir_load_reloc_const_intel(b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW),
offset),
nir_load_reloc_const_intel(b, BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH));
nir_load_reloc_const_intel(b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH));
nir_def *data =
nir_load_global_constant(b, const_data_addr,

6
src/intel/vulkan/anv_shader.c
View file

@ -330,17 +330,17 @@ anv_shader_set_relocs(struct anv_device *device,
};
assert((device->physical->va.instruction_state_pool.addr & 0xffffffff) == 0);
reloc_values[rv_count++] = (struct intel_shader_reloc_value) {
.id = BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW,
.id = INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW,
.value = shader_data_addr,
};
assert((device->physical->va.instruction_state_pool.addr & 0xffffffff) == 0);
assert(shader_data_addr >> 32 == device->physical->va.instruction_state_pool.addr >> 32);
reloc_values[rv_count++] = (struct intel_shader_reloc_value) {
.id = BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
.id = INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
.value = device->physical->va.instruction_state_pool.addr >> 32,
};
reloc_values[rv_count++] = (struct intel_shader_reloc_value) {
.id = BRW_SHADER_RELOC_SHADER_START_OFFSET,
.id = INTEL_SHADER_RELOC_SHADER_START_OFFSET,
.value = shader->kernel.offset,
};
if (brw_shader_stage_is_bindless(shader->vk.stage)) {

4
src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c
View file

@ -909,8 +909,8 @@ lower_load_constant(nir_builder *b, nir_intrinsic_instr *intrin,
offset = nir_umin(b, offset, nir_imm_int(b, max_offset));
nir_def *const_data_base_addr = nir_pack_64_2x32_split(b,
nir_load_reloc_const_intel(b, ELK_SHADER_RELOC_CONST_DATA_ADDR_LOW),
nir_load_reloc_const_intel(b, ELK_SHADER_RELOC_CONST_DATA_ADDR_HIGH));
nir_load_reloc_const_intel(b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW),
nir_load_reloc_const_intel(b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH));
data = nir_load_global_constant(b, nir_iadd(b, const_data_base_addr,
nir_u2u64(b, offset)),

16
src/intel/vulkan_hasvk/anv_pipeline_cache.c
View file

@ -81,7 +81,7 @@ anv_shader_bin_create(struct anv_device *device,
VK_MULTIALLOC_DECL_SIZE(&ma, void, obj_key_data, key_size);
VK_MULTIALLOC_DECL_SIZE(&ma, struct elk_stage_prog_data, prog_data,
prog_data_size);
VK_MULTIALLOC_DECL(&ma, struct elk_shader_reloc, prog_data_relocs,
VK_MULTIALLOC_DECL(&ma, struct intel_shader_reloc, prog_data_relocs,
prog_data_in->num_relocs);
VK_MULTIALLOC_DECL(&ma, uint32_t, prog_data_param, prog_data_in->nr_params);
@ -114,17 +114,17 @@ anv_shader_bin_create(struct anv_device *device,
prog_data_in->const_data_offset;
int rv_count = 0;
struct elk_shader_reloc_value reloc_values[5];
reloc_values[rv_count++] = (struct elk_shader_reloc_value) {
.id = ELK_SHADER_RELOC_CONST_DATA_ADDR_LOW,
struct intel_shader_reloc_value reloc_values[5];
reloc_values[rv_count++] = (struct intel_shader_reloc_value) {
.id = INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW,
.value = shader_data_addr,
};
reloc_values[rv_count++] = (struct elk_shader_reloc_value) {
.id = ELK_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
reloc_values[rv_count++] = (struct intel_shader_reloc_value) {
.id = INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
.value = shader_data_addr >> 32,
};
reloc_values[rv_count++] = (struct elk_shader_reloc_value) {
.id = ELK_SHADER_RELOC_SHADER_START_OFFSET,
reloc_values[rv_count++] = (struct intel_shader_reloc_value) {
.id = INTEL_SHADER_RELOC_SHADER_START_OFFSET,
.value = shader->kernel.offset,
};
elk_write_shader_relocs(&device->physical->compiler->isa,