More fallout from f2a59fdea6.
is_not_zero now always returns whether the result is a floating point zero.
When combined with the fp denorm handling that will be added to
floating point range analysis, this is false for many sensible integer values.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39987>
This is not NaN correct.
And also make the pattern 32bit only because the constant is hard coded
FLT_MAX.
Fixes: 780b5c1037 ("nir/algebraic: Simplify some Inf and NaN avoidance code")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39987>
There was duplicated code to set unscaled_input_fragcoord and a read
from VK_ATTACHMENT_UNUSED attachment, which incorrectly updated
builder->unscaled_input_fragcoord.
ubsan:
tu_pipeline.cc:4734:44: runtime error: load of value 127, which is not a valid value for type 'bool'
Seen in:
dEQP-VK.renderpasses.renderpass1.custom_resolve.monolithic.stencil_only_s8
Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40264>
D/S tests are disabled if subpass doesn't declare D/S being used, when
resolving D/S via draw call - test/write has to be enabled.
Fixes D/S tests from:
dEQP-VK.renderpasses.dynamic_rendering.primary_cmd_buff.custom_resolve.*
Fixes: 5a3b0ce461 ("tu: avoid incorrect pipeline draw state for disabled depth/stencil attachments")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40264>
For dynamic renderpass we created a fake second subpass,
which would is used by CmdBeginCustomResolveEXT, however
CmdBeginCustomResolveEXT doesn't trigger tile stores, but
attachments didn't know they should be stored after fake
custom resolve subpass.
Fixes: 520e3f3a47 ("tu: Implement VK_EXT_custom_resolve")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40264>
The way it is, this optimization is too aggressive and may generate
code way worse than the original. Remove it from here, so drivers
consuming the generated SPIR-V will be able to make their own
more-informed decisions later.
Let's follow the same strategy of nir_load_liblc.c and just set the
limit to 0.
For indirect copies in Anv (not merged yet), block compressed formats
require some expensive divisions, so I put them all inside 'if'
statements that should never run on normal formats. This optimization
made us always run all the divisions all the time, tanking the
performance of the shader on small copies.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40020>
There are now no regressions in CTS (including no VVL errors) with
optimal keys on Turnip, so enable it by default.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40049>
Split texkill_cond into texkill_unary (single source) and texkill_binary
(two sources) variants. Update the compiler to use ISA_OPC_TEXKILL_UNARY for
discard emission since it only uses a single source operand.
Fixes: 081efcd68d ("etnaviv: isa: Split texkill into concrete bitset variants")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40262>
Use INT_MIN instead of INT_MAX for underflow.
Fixes: cc4b50b023 ("nir/opcodes: use u_overflow to fix incorrect checks")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pelloux@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40252>
When emitting the bin size, take into account per-view bin merging we
may have done that expands the size of the bin in GMEM by reusing the
right eye data for the left eye.
This fixes resolves getting clipped by the smaller bin size when using
the resolve engine. Before now we weren't using the resolve engine with
FDM, and for now we only do the merging when GMEM is enabled, so it
wasn't an issue.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
With subsampled images we need access to the immutable samplers, even
though it's already been written when creating the descriptor set.
Previously we only kept a pointer to them in the template in the push
descriptor case where we needed to write them together with the image.
Refactor the descriptor template path to be more like the normal path
and always save the immutable samplers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
As of now we always emit resolves during the subpass when they happen,
so we can just use that subpass's viewMask. But that won't work for
subsampled images, where we need to insert metadata and aprons for any
view resolved to after the renderpass is finished. Collect all the
resolve views for use with subsampled images.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
This doesn't actually emit any commands, it just dirties state to be
emitted later. In a resuming render pass, we can't rely on an earlier
suspending pass to actually have a draw call and emit the dirty state,
so we have to dirty these anyway. And it also sets fdm_enabled, which we
forgot to do with resuming render passes. Rename it to
tu_renderpass_begin() since it doesn't actually emit anything, and call
it for resuming render passes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
With subsampled images, we will have to do a global pass over all of the
tiles in the framebuffer in order to determine the coordinates of the
subsampled image, we have to know the bin merging state, and we have to
remember what we chose so that we can emit the table of bin positions.
Create an array of tile configs for all tiles, and move all FDM-related
calculation to tu_calc_tile_config().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
With most Vulkan engines doing multithreaded compiles, NIR_DEBUG=print has
been a frustrating racy mess. Take a lock when we're doing per-pass
printing, so that the output is coherent. This unfortunately
single-threads the compiler process itself in that case, but when you're
NIR_DEBUG=printing, that's probably not a big deal.
An assert is introduced to make sure that nobody nests NIR_PASS() in a way
that would break printing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40126>
These PCI IDs were added to the drm xe driver in the
be07d8f707e41cb694c4a56364978c30683a687d patch of the
drm-xe-next-2026-03-02 tag. (With require_force_probe set in the xe
driver.)
Ref: be07d8f707e4 ("drm/xe/nvlp: Add NVL-P platform definition")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
Rework:
* Jordan: Update intel_dev_info.c::print_base_devinfo() to add new
stage_names
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
